The DS90UB936-Q1 is a
versatile
deserializer
capable of receiving serialized sensor data from
source through an FPD-Link
III interface. When paired with
a
DS90UB935-Q1 serializer, the DS90UB936-Q1 receives data from imagers supporting
up to 2.528 Gbps CSI-2 throughput. The DS90UB936-Q1 may also be
used with other compatible serializers such as the DS90UB933-Q1, and
DS90UB913A-Q1.
When configuring the CSI-2 interface for 2-lane operation,
a duplicate MIPI CSI-2 clock lane is available to provide a replicated output.
Replication mode creates two copies of the video stream
for data logging and parallel processing.
The
DS90UB935/936-Q1
chipset is AEC-Q100 qualified and designed to receive data across either
50-Ω single-ended coaxial or 100-Ω differential STP cables. AEC-Q100 qualification
includes device temperature grade 2 (–40℃ to +105℃ ambient operating temperature
range), device HBM ESD classification level ±4.5 kV, and device CDM ESD
classification level C5. The deserializer hub is ideal for Power-over-Coax
applications and the receive equalizer automatically adapts to compensate for cable
loss characteristics with no additional programming required, including cable
degradation over time.
Each FPD-Link III interface includes a separate low latency bidirectional control
channel (BCC) that continuously conveys I2C, GPIO, and other control information.
GPIO signals purposed for sensor synchronization and diagnostic features also make
use of the BCC.
The DS90UB936-Q1 is a
versatile
deserializer
capable of receiving serialized sensor data from
source through an FPD-Link
III interface. When paired with
a
DS90UB935-Q1 serializer, the DS90UB936-Q1 receives data from imagers supporting
up to 2.528 Gbps CSI-2 throughput. The DS90UB936-Q1 may also be
used with other compatible serializers such as the DS90UB933-Q1, and
DS90UB913A-Q1.
When configuring the CSI-2 interface for 2-lane operation,
a duplicate MIPI CSI-2 clock lane is available to provide a replicated output.
Replication mode creates two copies of the video stream
for data logging and parallel processing.
The
DS90UB935/936-Q1
chipset is AEC-Q100 qualified and designed to receive data across either
50-Ω single-ended coaxial or 100-Ω differential STP cables. AEC-Q100 qualification
includes device temperature grade 2 (–40℃ to +105℃ ambient operating temperature
range), device HBM ESD classification level ±4.5 kV, and device CDM ESD
classification level C5. The deserializer hub is ideal for Power-over-Coax
applications and the receive equalizer automatically adapts to compensate for cable
loss characteristics with no additional programming required, including cable
degradation over time.
Each FPD-Link III interface includes a separate low latency bidirectional control
channel (BCC) that continuously conveys I2C, GPIO, and other control information.
GPIO signals purposed for sensor synchronization and diagnostic features also make
use of the BCC.