Startseite Schnittstelle LVDS-, M-LVDS- und PECL-ICs
NEU

SN55LVTA4-SEP

AKTIV

Strahlungstoleranter, vierkanaliger Highspeed-Differenzialleitungstreiber

Produktdetails

Function Driver Protocols LVDS Number of transmitters 4 Number of receivers 0 Supply voltage (V) 3.3 Signaling rate (Mbps) 400 Input signal LVTTL Output signal LVDS Rating Space Operating temperature range (°C) -55 to 125
Function Driver Protocols LVDS Number of transmitters 4 Number of receivers 0 Supply voltage (V) 3.3 Signaling rate (Mbps) 400 Input signal LVTTL Output signal LVDS Rating Space Operating temperature range (°C) -55 to 125
SOIC (D) 16 59.4 mm² 9.9 x 6
  • VID V62/25605-01XE
  • Total ionizing dose characterized at 30krad (Si)
    • Total ionizing dose radiation lot acceptance testing (TID RLAT) for every wafer lot to 30krad (Si)
  • Single-event effects (SEE) characterized:
    • Single event latch-up (SEL) immune to linear energy transfer (LET) = 50MeV-cm2 /mg
    • Single event transient (SET) characterized to 50MeV-cm2/mg.
  • Meet or exceed the requirements of ANSI TIA/EIA-644 standard
  • Low-voltage differential signaling with typical output voltage of 350mV and 100Ω load
  • Typical output voltage rise and fall times of 500ps (400Mbps)
  • Typical propagation delay times of 1.7ns
  • Operate from a single 3.3V supply
  • Power dissipation 25mW typical per driver at 200MHz
  • Driver at high impedance when disabled or with VCC = 0
  • Bus-terminal ESD protection exceeds 8kV
  • Low-voltage TTL (LVTTL) logic input levels
  • Cold sparing for space and high reliability applications requiring redundancy
  • Space enhanced plastic (SEP)
    • Controlled baseline
    • Gold wire, NiPdAu lead finish
    • One assembly and test site, one fabrication site
    • Extended product life cycle
    • Military (–55°C to 125°C) temperature range
    • Product traceability
    • Meets NASA ASTM E595 outgassing specification
  • VID V62/25605-01XE
  • Total ionizing dose characterized at 30krad (Si)
    • Total ionizing dose radiation lot acceptance testing (TID RLAT) for every wafer lot to 30krad (Si)
  • Single-event effects (SEE) characterized:
    • Single event latch-up (SEL) immune to linear energy transfer (LET) = 50MeV-cm2 /mg
    • Single event transient (SET) characterized to 50MeV-cm2/mg.
  • Meet or exceed the requirements of ANSI TIA/EIA-644 standard
  • Low-voltage differential signaling with typical output voltage of 350mV and 100Ω load
  • Typical output voltage rise and fall times of 500ps (400Mbps)
  • Typical propagation delay times of 1.7ns
  • Operate from a single 3.3V supply
  • Power dissipation 25mW typical per driver at 200MHz
  • Driver at high impedance when disabled or with VCC = 0
  • Bus-terminal ESD protection exceeds 8kV
  • Low-voltage TTL (LVTTL) logic input levels
  • Cold sparing for space and high reliability applications requiring redundancy
  • Space enhanced plastic (SEP)
    • Controlled baseline
    • Gold wire, NiPdAu lead finish
    • One assembly and test site, one fabrication site
    • Extended product life cycle
    • Military (–55°C to 125°C) temperature range
    • Product traceability
    • Meets NASA ASTM E595 outgassing specification

The SN55LVTA4-SEP is a differential line driver that implements the electrical characteristics of low-voltage differential signaling (LVDS) with a 3.3V supply. This driver delivers a minimum differential output voltage magnitude of 247mV into a 100Ω load when enabled.

The intended application of this device and signaling technique is both point-to-point and multi-drop (one driver and multiple receivers) data transmission over controlled impedance media of approximately 100Ω. The transmission media can be printed-circuit board traces, backplanes, or cables. The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media and the noise coupling to the environment.

The SN55LVTA4-SEP is characterized for operation from –55°C to 125°C.

The SN55LVTA4-SEP is a differential line driver that implements the electrical characteristics of low-voltage differential signaling (LVDS) with a 3.3V supply. This driver delivers a minimum differential output voltage magnitude of 247mV into a 100Ω load when enabled.

The intended application of this device and signaling technique is both point-to-point and multi-drop (one driver and multiple receivers) data transmission over controlled impedance media of approximately 100Ω. The transmission media can be printed-circuit board traces, backplanes, or cables. The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media and the noise coupling to the environment.

The SN55LVTA4-SEP is characterized for operation from –55°C to 125°C.

Herunterladen Video mit Transkript ansehen Video

Ähnliche Produkte, die für Sie interessant sein könnten

Ähnliche Funktionalität wie verglichener Baustein
NEU SN55LVRA4-SEP AKTIV Vierkanal-Highspeed-Differenzialempfänger Line Receiver version

Technische Dokumentation

star =Von TI ausgewählte Top-Empfehlungen für dieses Produkt
Keine Ergebnisse gefunden. Bitte geben Sie einen anderen Begriff ein und versuchen Sie es erneut.
Alle anzeigen 5
Typ Titel Datum
* Data sheet SN55LVTA4-SEP Radiation Tolerant Quad Channel High-Speed Differential Line Driver datasheet (Rev. A) PDF | HTML 30 Jun 2025
* Radiation & reliability report SN55LVTA4-SEP Single-Event Effects (SEE) Radiation Report PDF | HTML 23 Jun 2025
* Radiation & reliability report SN55LVTA4-SEP Total Ionizing Dose (TID) Report PDF | HTML 23 Jun 2025
* Radiation & reliability report SN55LVTA4-SEP Production Flow and Reliability Report PDF | HTML 03 Jun 2025
Selection guide TI Space Products (Rev. K) 04 Apr 2025

Design und Entwicklung

Weitere Bedingungen oder erforderliche Ressourcen enthält gegebenenfalls die Detailseite, die Sie durch Klicken auf einen der unten stehenden Titel erreichen.

Evaluierungsplatine

SN65LVDS31-33EVM — Evaluierungsmodul für SN65LVDS31 und SN65LVDS33

TI offers a series of low-voltage differential signaling (LVDS) evaluation modules (EVMs) designed for analysis of the electrical characteristics of LVDS drivers and receivers. Four unique EVMs are available to evaluate the different classes of LVDS devices offered by TI.

As seen in the Combination (...)

Benutzerhandbuch: PDF
Simulationsmodell

SN65LVDS31 IBIS Model (Rev. B)

SLLC012B.ZIP (6 KB) - IBIS Model
Simulationstool

PSPICE-FOR-TI — PSpice® für TI Design-und Simulationstool

PSpice® für TI ist eine Design- und Simulationsumgebung, welche Sie dabei unterstützt, die Funktionalität analoger Schaltungen zu evaluieren. Diese Design- und Simulationssuite mit vollem Funktionsumfang verwendet eine analoge Analyse-Engine von Cadence®. PSpice für TI ist kostenlos erhältlich und (...)
Simulationstool

TINA-TI — SPICE-basiertes analoges Simulationsprogramm

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
Benutzerhandbuch: PDF
Gehäuse Pins CAD-Symbole, Footprints und 3D-Modelle
SOIC (D) 16 Ultra Librarian

Bestellen & Qualität

Beinhaltete Information:
  • RoHS
  • REACH
  • Bausteinkennzeichnung
  • Blei-Finish/Ball-Material
  • MSL-Rating / Spitzenrückfluss
  • MTBF-/FIT-Schätzungen
  • Materialinhalt
  • Qualifikationszusammenfassung
  • Kontinuierliches Zuverlässigkeitsmonitoring
Beinhaltete Information:
  • Werksstandort
  • Montagestandort

Empfohlene Produkte können Parameter, Evaluierungsmodule oder Referenzdesigns zu diesem TI-Produkt beinhalten.

Support und Schulungen

TI E2E™-Foren mit technischem Support von TI-Ingenieuren

Inhalte werden ohne Gewähr von TI und der Community bereitgestellt. Sie stellen keine Spezifikationen von TI dar. Siehe Nutzungsbedingungen.

Bei Fragen zu den Themen Qualität, Gehäuse oder Bestellung von TI-Produkten siehe TI-Support. ​​​​​​​​​​​​​​

Videos