The CDCE925 and CDCEL925 are modular PLL-based low-cost, high-performance, programmable clock synthesizers, multipliers, and dividers. CDCE925 and CDCEL925 generate up to five output clocks from a single input frequency. Each output can be programmed in-system for any clock frequency up to 230MHz, using up to two independent configurable PLLs.
The CDCEx925 has a separate output supply pin, VDDOUT, which is 1.8V for CDCEL925 and 2.5V to 3.3V for CDCE925.
The input accepts an external crystal or LVCMOS clock signal. In case of a crystal input, an on-chip load capacitor is adequate for most applications. The value of the load capacitor is programmable from 0 to 20pF. Additionally, an on-chip VCXO is selectable which allows synchronization of the output frequency to an external control signal, that is, PWM signal.
The deep M/N divider ratio allows the generation of zero-ppm audio/video, networking (WLAN, Bluetooth, Ethernet, GPS), or interface (USB, IEEE1394, memory stick) clocks from a 27MHz reference input frequency, for example.
All PLLs support SSC (spread-spectrum clocking). SSC can be center-spread or down-spread clocking, which is a common technique to reduce electromagnetic interference (EMI).
Based on the PLL frequency and the divider settings, the internal loop filter components are automatically adjusted to achieve high stability and optimized jitter transfer characteristic of each PLL.
The device supports nonvolatile EEPROM programming for easy customization of the device in the application. It is preset to a factory default configuration and can be reprogrammed to a different application configuration before it goes onto the PCB or reprogrammed by in-system programming. All device settings are programmable through the SDA/SCL bus, a 2-wire serial interface.
Three, free programmable control inputs, S0, S1, and S2, can be used to select different frequencies, or change the SSC setting for lowering EMI, or other control features like outputs disable to low, outputs in high-impedance state, power down, PLL bypass, and so forth.
The CDCx925 operates in a 1.8V environment and in a temperature range of –40°C to 85°C.
| Documentación principal | Tipo | Título | Opciones de formato | Descargar la versión más reciente en inglés | Fecha |
|---|---|---|---|---|---|
| * | Hoja de datos | CDCE(L)925: Flexible Low Power LVCMOS Clock Generator With SSC Support for EMI Reduction datasheet (Rev. J) | PDF | HTML | 24/06/2025 | |
| Nota sobre la aplicación | VCXO Application Guideline for CDCE(L)9xx Family (Rev. A) | 23/04/2012 | |||
| Guía del usuario | CDCE(L)9XX & CDCEx06 Programming Evaluation Module Manual (Rev. A) | 22/11/2010 | |||
| Guía del usuario | CDCE(L)9xx Performance Evaluation Module (Rev. A) | 7/07/2010 | |||
| Nota sobre la aplicación | General I2C / EEPROM usage for the CDCE(L)9xx family | 26/01/2010 | |||
| Nota sobre la aplicación | Troubleshooting I2C Bus Protocol | 19/10/2009 | |||
| Nota sobre la aplicación | Usage of I2C for CDCE(L)949, CDCE(L)937, CDCE(L)925, CDCE(L)913 | 23/09/2009 | |||
| Nota sobre la aplicación | Generating Low Phase-Noise Clocks for Audio Data Converters from Low Frequency | 31/03/2008 | |||
| Nota sobre la aplicación | Practical consideration on choosing a crystal for CDCE(L)9xx family | 24/03/2008 |
Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.
The CDCE925Perf-Evaluation Module allows the verification of the functionality and performance of CDCE925 and CDCEL925 with the options of crystal and 1.8 V LVCMOS inputs. The outputs can be connected to the Oscilloscope directly with SMA cables.
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The Linux driver supports the CDCE925 Programmable 2-PLL VCXO Clock Synthesizer with 2.5-V or 3.3-V LVCMOS Outputs. The Linux driver supports communication through the I2C bus.
Linux Mainline StatusAvailable in Linux Main line: Yes
Available through git.ti.com: N/A
TI's ClockPro software allows users to program/configure the following devices in a friendly GUI interface:
It is intended to be used with the evaluation modules of the above devices.
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| Encapsulado | Pines | Símbolos CAD, huellas y modelos 3D |
|---|---|---|
| TSSOP (PW) | 16 | Ultra Librarian |
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