CDCE925
Sintetizador de reloj VCXO programable de 2 PLL con salidas LVCMOS de 2,5 V o 3,3 V.
CDCE925
- Member of Programmable Clock Generator Family
- CDCEx913: 1-PLL, 3 Outputs
- CDCEx925: 2-PLL, 5 Outputs
- CDCEx925: 3-PLL, 7 Outputs
- CDCEx949: 4-PLL, 9 Outputs
- In-System Programmability and EEPROM
- Serial Programmable Volatile Register
- Nonvolatile EEPROM to Store Customer Settings
- Flexible Input Clocking Concept
- External Crystal: 8 MHz to 32 MHz
- On-Chip VCXO: Pull Range ±150 ppm
- Single-Ended LVCMOS Up to 160 MHz
- Free Selectable Output Frequency Up to 230 MHz
- Low-Noise PLL Core
- PLL Loop Filter Components Integrated
- Low Period Jitter (Typical 60 ps)
- Separate Output Supply Pins
- CDCE925: 3.3 V and 2.5 V
- CDCEL925: 1.8 V
- Flexible Clock Driver
- Three User-Definable Control Inputs [S0/S1/S2], for Example, SSC Selection, Frequency Switching, Output Enable, or Power Down
- Generates Highly Accurate Clocks for Video, Audio, USB, IEEE1394, RFID, Bluetooth®, WLAN, Ethernet™, and GPS
- Generates Common Clock Frequencies Used With TI-DaVinci™, OMAP™, DSPs
- Programmable SSC Modulation
- Enables 0-PPM Clock Generation
- 1.8-V Device Power Supply
- Wide Temperature Range: –40°C to 85°C
- Packaged in TSSOP
- Development and Programming Kit for Easy PLL Design and Programming (TI Pro-Clock™)
- APPLICATIONS
- D-TVs, STBs, IP-STBs, DVD Players, DVD Recorders, and Printers
All other trademarks are the property of their respective owners
The CDCE925 and CDCEL925 are modular PLL-based low-cost, high-performance, programmable clock synthesizers, multipliers, and dividers. They generate up to five output clocks from a single input frequency. Each output can be programmed in-system for any clock frequency up to 230 MHz, using up to two independent configurable PLLs.
The CDCEx925 has a separate output supply pin, VDDOUT, which is 1.8 V for CDCEL925 and 2.5 V to 3.3 V for CDCE925.
The input accepts an external crystal or LVCMOS clock signal. In case of a crystal input, an on-chip load capacitor is adequate for most applications. The value of the load capacitor is programmable from 0 to 20 pF. Additionally, an on-chip VCXO is selectable which allows synchronization of the output frequency to an external control signal, that is, PWM signal.
The deep M/N divider ratio allows the generation of zero-ppm audio/video, networking (WLAN, Bluetooth, Ethernet, GPS), or interface (USB, IEEE1394, memory stick) clocks from a 27-MHz reference input frequency, for example.
All PLLs support SSC (spread-spectrum clocking). SSC can be center-spread or down-spread clocking, which is a common technique to reduce electromagnetic interference (EMI).
Based on the PLL frequency and the divider settings, the internal loop filter components are automatically adjusted to achieve high stability and optimized jitter transfer characteristic of each PLL.
The device supports nonvolatile EEPROM programming for easy customization of the device in the application. It is preset to a factory default configuration and can be reprogrammed to a different application configuration before it goes onto the PCB or reprogrammed by in-system programming. All device settings are programmable through the SDA/SCL bus, a 2-wire serial interface.
Three, free programmable control inputs, S0, S1, and S2, can be used to select different frequencies, or change the SSC setting for lowering EMI, or other control features like outputs disable to low, outputs in high-impedance state, power down, PLL bypass, and so forth.
The CDCx925 operates in a 1.8-V environment and in a temperature range of –40°C to 85°C.
Documentación técnica
Tipo | Título | Fecha | ||
---|---|---|---|---|
* | Data sheet | CDCE(L)925: Flexible Low Power LVCMOS Clock Generator With SSC Support for EMI Reduction datasheet (Rev. I) | PDF | HTML | 27 oct 2016 |
Application note | VCXO Application Guideline for CDCE(L)9xx Family (Rev. A) | 23 abr 2012 | ||
User guide | CDCE(L)9XX & CDCEx06 Programming Evaluation Module Manual (Rev. A) | 22 nov 2010 | ||
User guide | CDCE(L)9xx Performance Evaluation Module (Rev. A) | 07 jul 2010 | ||
Application note | General I2C / EEPROM usage for the CDCE(L)9xx family | 26 ene 2010 | ||
Application note | Troubleshooting I2C Bus Protocol | 19 oct 2009 | ||
Application note | Usage of I2C for CDCE(L)949, CDCE(L)937, CDCE(L)925, CDCE(L)913 | 23 sep 2009 | ||
User guide | CDCE(L)9XX & CDCEx06 Programming Evaluation Module Manual | 09 dic 2008 | ||
Application note | Generating Low Phase-Noise Clocks for Audio Data Converters from Low Frequency | 31 mar 2008 | ||
Application note | Practical consideration on choosing a crystal for CDCE(L)9xx family | 24 mar 2008 |
Diseño y desarrollo
Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.
CDCE925PERF-EVM — Módulo de evaluación del rendimiento de CDCE925
The CDCE925Perf-Evaluation Module allows the verification of the functionality and performance of CDCE925 and CDCEL925 with the options of crystal and 1.8 V LVCMOS inputs. The outputs can be connected to the Oscilloscope directly with SMA cables.
CDCEL9XXPROGEVM — Placa de programación EEPROM de la familia CDCE(L)949
The clock generator CDCE(L)949 family has integrated EEPROM that allows the default frequency settings to be saved upon start up. CDCEL9XXPROGEVM is a programming board that allows a fast programming of prototyping samples or small production quantities. It applies to all 8 devices in the family: (...)
DP83822EVM — Módulo de evaluación PHY Ethernet de 10 Mbps y 100 Mbps DP83822I
El DP83822EVM es compatible con 100BASE-FX, 100BASE-TX y 10BASE-Te. Este diseño ha sido probado y validado en UNH para su cumplimiento. También cuenta con certificación de emisiones Clase A y tiene una calificación de ±8 kV IEC61000-4-2 (descarga de contacto).
El DP83822EVM incorpora dos LED de (...)
CDCE925SW-LINUX — Controlador Linux para CDCE925
Linux Mainline Status
Available in Linux Main line: Yes
Available through git.ti.com: N/A
- cdce925
SCAC131 — Drivers for the CDCEL9xx programmer EVM
Productos y hardware compatibles
Productos
Generadores de señal de reloj
Desarrollo de hardware
Placa de evaluación
CLOCKPRO — ClockPro Software
TI's ClockPro software allows users to program/configure the following devices in a friendly GUI interface:
- CDCE949
- CDCE937
- CDCE925
- CDCE913
- CDCE906
- CDCE706
- CDCEL949
- CDCEL937
- CDCEL925
- CDCEL913
It is intended to be used with the evaluation modules of the above devices.
Productos y hardware compatibles
Productos
Generadores de señal de reloj
Desarrollo de hardware
Placa de evaluación
Software
Herramienta de programación de software
SCAC073 — TI-Pro-Clock Programming Software
Productos y hardware compatibles
Productos
Generadores de señal de reloj
CLOCK-TREE-ARCHITECT — Software de programación de diseño de árbol de reloj
PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI
Encapsulado | Pines | Símbolos CAD, huellas y modelos 3D |
---|---|---|
TSSOP (PW) | 16 | Ultra Librarian |
Pedidos y calidad
- RoHS
- REACH
- Marcado del dispositivo
- Acabado de plomo/material de la bola
- Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
- Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
- Contenido del material
- Resumen de calificaciones
- Monitoreo continuo de confiabilidad
- Lugar de fabricación
- Lugar de ensamblaje
Los productos recomendados pueden tener parámetros, módulos de evaluación o diseños de referencia relacionados con este producto de TI.
Soporte y capacitación
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