Ejemplo de código o demostración
CDCM6208
Generador de reloj de cristal 2:8 de potencia ultrabaja y baja fluctuación
Hoja de datos
CDCM6208
- Superior Performance With Low Power:
- Low Noise Synthesizer (265 fs-rms Typical Jitter) or Low Noise Jitter Cleaner (1.6 ps-rms Typical Jitter)
- 0.5-W Typical Power Consumption
- High Channel-to-Channel Isolation and Excellent PSRR
- Device Performance Customizable Through Flexible 1.8-V, 2.5-V and 3.3-V Power Supplies, Allowing Mixed Output Voltages
- Flexible Frequency Planning:
- 4x Integer Down-Divided Differential Clock Outputs Supporting LVPECL-Like, CML, or LVDS-Like Signaling
- 4x Fractional or Integer Divided Differential Clock Outputs Supporting HCSL, LVDS-Like Signaling, or Eight CMOS Outputs
- Fractional Output Divider Achieve 0 ppm to < 1 ppm Frequency Error and Eliminates Need for Crystal Oscillators and Other Clock Generators
- Output Frequencies up to 800 MHz
- Two Differential Inputs, XTAL Support, Ability for Smart Switching
- SPI, I2C, and Pin Programmable
- Professional User GUI for Quick Design Turnaround
- 7 × 7 mm 48-VQFN package (RGZ)
- –40°C to 85°C Temperature Range
The CDCM6208 is a highly versatile, low jitter low power frequency synthesizer which can generate eight low jitter clock outputs, selectable between LVPECL-like high-swing CML, normal-swing CML, LVDS-like low-power CML, HCSL, or LVCMOS, from one of two inputs that can feature a low frequency crystal or CML, LVPECL, LVDS, or LVCMOS signals for a variety of wireless infrastructure baseband, Small Cells, wireline data communication, computing, low power medical imaging and portable test and measurement applications. The CDCM6208 also features an innovative fractional divider architecture for four of its outputs that can generate any frequency with better than 1ppm frequency accuracy. The CDCM6208 can be easily configured through I2C or SPI programming interface and in the absence of serial interface, pin mode is also available that can set the device in 1 of 32 distinct pre-programmed configurations using control pins.
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Documentación técnica
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Ver todo 7 | Tipo | Título | Fecha | ||
|---|---|---|---|---|
| * | Data sheet | CDCM6208 2:8 Clock Generator, Jitter Cleaner With Fractional Dividers datasheet (Rev. G) | PDF | HTML | 09 ene 2018 |
| Application note | How to measure Total Jitter (TJ) (Rev. B) | 08 ago 2017 | ||
| Technical article | The five benefits of multifaceted clocking devices | PDF | HTML | 17 may 2016 | |
| Application note | Crystal or Crystal Oscillator Replacement with Silicon Devices | 18 jun 2014 | ||
| EVM User's guide | CDCM6208 EVM User's Guide (Rev. A) | 19 dic 2012 | ||
| Application note | Driving the TLK10002 10Gpbs SERDES with the CDCM6208 Clock Generator | 14 dic 2012 | ||
| Application note | A Step by Step Guide on Using the MSP430 as a Bootloader for the CDCM6208VxEVM (Rev. A) | 04 dic 2012 |
Diseño y desarrollo
Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.
Placa de evaluación
CDCM6208V1EVM — Módulo de evaluación CDCM6208V1
The CDCM6208 is a highly versatile, low jitter low power frequency synthesizer which can generate eight clock outputs, selectable between LVPECL-like high-swing CML, normal-swing CML, LVDS-like low-power CML, HCSL, or LVCMOS, from one of two inputs that can feature a low frequency crystal or CML, (...)
Guía del usuario: PDF
Placa de evaluación
CDCM6208V2EVM — Módulo de evaluación CDCM6208V2
The CDCM6208 is a highly versatile, low jitter low power frequency synthesizer which can generate eight clock outputs, selectable between LVPECL-like high-swing CML, normal-swing CML, LVDS-like low-power CML, HCSL, or LVCMOS, from one of two inputs that can feature a low frequency crystal or CML, (...)
Guía del usuario: PDF
Kit de desarrollo
EVMK2GX — Módulo de evaluación 66AK2Gx de 1 GHz
The EVMK2GX (also known as "K2G") 1GHz evaluation module (EVM) enables developers to immediately start evaluating the 66AK2Gx processor family, and to accelerate the development of audio, industrial motor control, smart grid protection and other high reliability, real-time compute intensive (...)
Guía del usuario: PDF
Kit de desarrollo
EVMK2GXS — Módulo de evaluación 66AK2Gx (K2G) de 1 GHz y alta seguridad
The K2G 1GHz High Secure Evaluation Module (EVM) enables developers to start evaluating and testing the programming of the high secure developmental version of the 66AK2Gx processor, and to accelerate the next stage of secure boot product development of audio and industrial real (...)
Guía del usuario: PDF
Firmware
SLAC550 — CDCM6208EVM - I2C Firmware Update Files
Productos y hardware compatibles
Productos
Generadores de señal de reloj
Desarrollo de hardware
Placa de evaluación
GUI para el módulo de evaluación (EVM)
SCAC134 — CDCM6208 EVM Control GUI
Productos y hardware compatibles
Productos
Generadores de señal de reloj
Desarrollo de hardware
Placa de evaluación
Herramienta de simulación
PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI
PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Diseños de referencia
TIDEP0069 — Diseño de referencia de procesamiento de audio del procesador 66AK2Gx DSP + ARM
This reference design is a reference platform based on the 66AK2Gx DSP + ARM processor System-On-Chip (SoC) and companion AIC3106 Audio codec and enables a quick path to audio processing algorithm design and demonstration. This audio solution design includes real time application software (...)
Diseños de referencia
TIDEP0067 — Diseño de referencia de solución de potencia del procesador 66AK2Gx DSP + ARM
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Diseños de referencia
TIDEP0068 — Diseño de referencia de las consideraciones de diseño de PCI Express PCB para EVM de uso general (GP
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Diseños de referencia
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Diseños de referencia
TIDA-00352 — Diseño de referencia de agregación de video SDI
This verified reference design is a complete four channel SDI aggregation and de-aggregation solution. One TLK10022 is used to aggregate four synchronous HD-SDI sources together into one 5.94 Gbps serial link. The serial data is transferred via copper or optical fiber where a second TLK10022 is (...)
Diseños de referencia
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Diseños de referencia
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Diseños de referencia
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The TIDA-00234 XAUI to SFI reference design is intended for Enterprise and Service Provider Networking applications like Ethernet Switches and Routers that implement multiple 10G Ethernet compliant Optical (SFP+) ports. This reference design features the TLK10232 device which is the most compact (...)
| Encapsulado | Pines | Símbolos CAD, huellas y modelos 3D |
|---|---|---|
| VQFN (RGZ) | 48 | Ultra Librarian |
Pedidos y calidad
Información incluida:
- RoHS
- REACH
- Marcado del dispositivo
- Acabado de plomo/material de la bola
- Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
- Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
- Contenido del material
- Resumen de calificaciones
- Monitoreo continuo de confiabilidad
Información incluida:
- Lugar de fabricación
- Lugar de ensamblaje
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Soporte y capacitación
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