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Interruptores y multiplexores
Interruptores y multiplexores analógicos

SN74CBTLV3257

ACTIVO

Interruptor analógico de 3.3 V, 2:1 (SPDT) y 4 canales con modo de apagado parcial

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SN74CBTLV3257

ACTIVO
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Detalles del producto

Configuration 2:1 SPDT Number of channels 4 Power supply voltage - single (V) 2.5, 3.3 Protocols Analog, I2C, I2S, JTAG, RGMII, SPI, TDM, UART Ron (typ) (Ω) 5 ON-state leakage current (max) (µA) 1 Bandwidth (MHz) 200 Operating temperature range (°C) -40 to 85 Features Powered-off protection Input/output continuous current (max) (mA) 128 Rating Catalog Drain supply voltage (max) (V) 3.6 Supply voltage (max) (V) 3.6
Configuration 2:1 SPDT Number of channels 4 Power supply voltage - single (V) 2.5, 3.3 Protocols Analog, I2C, I2S, JTAG, RGMII, SPI, TDM, UART Ron (typ) (Ω) 5 ON-state leakage current (max) (µA) 1 Bandwidth (MHz) 200 Operating temperature range (°C) -40 to 85 Features Powered-off protection Input/output continuous current (max) (mA) 128 Rating Catalog Drain supply voltage (max) (V) 3.6 Supply voltage (max) (V) 3.6
SOIC (D) 16 59.4 mm² 9.9 x 6 SSOP (DBQ) 16 29.4 mm² 4.9 x 6 TSSOP (PW) 16 32 mm² 5 x 6.4 TVSOP (DGV) 16 23.04 mm² 3.6 x 6.4 UQFN (RSV) 16 4.68 mm² 2.6 x 1.8 VQFN (RGY) 16 14 mm² 4 x 3.5
  • 5-Ω Switch Connection Between Two Ports
  • Rail-to-Rail Switching on Data I/O Ports
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
  • 5-Ω Switch Connection Between Two Ports
  • Rail-to-Rail Switching on Data I/O Ports
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)

The SN74CBTLV3257 device is a 4-bit 1-of-2 high-speed FET multiplexer/demultiplexer. The low on-state resistance of the switch allows connections to be made with minimal propagation delay.

The select (S) input controls the data flow. The FET multiplexers/demultiplexers are disabled when the output-enable (OE) input is high.

This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN74CBTLV3257 device is a 4-bit 1-of-2 high-speed FET multiplexer/demultiplexer. The low on-state resistance of the switch allows connections to be made with minimal propagation delay.

The select (S) input controls the data flow. The FET multiplexers/demultiplexers are disabled when the output-enable (OE) input is high.

This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
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Documentación técnica

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Tipo Título Fecha
* Data sheet SN74CBTLV3257 Low-Voltage 4-Bit 1-of-2 FET Multiplexer/Demultiplexer datasheet (Rev. M) PDF | HTML 24 jul 2018
Application note Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML 02 jun 2022
Application note Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML 01 dic 2021
Application brief Enabling SPI-Based Flash Memory Expansion by Using Multiplexers (Rev. B) PDF | HTML 07 oct 2021
Application brief Eliminate Power Sequencing with Powered-off Protection Signal Switches (Rev. C) PDF | HTML 06 ene 2021
Selection guide Little Logic Guide 2018 (Rev. G) 06 jul 2018
Selection guide Logic Guide (Rev. AB) 12 jun 2017
Application note How to Select Little Logic (Rev. A) 26 jul 2016
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 dic 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 ene 2007
More literature Digital Bus Switch Selection Guide (Rev. A) 10 nov 2004
Product overview Design Summary for WCSP Little Logic (Rev. B) 04 nov 2004
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 jul 2004
User guide Signal Switch Data Book (Rev. A) 14 nov 2003
Application note Bus FET Switch Solutions for Live Insertion Applications 07 feb 2003
Application note Texas Instruments Little Logic Application Report 01 nov 2002
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 ago 2002
More literature Standard Linear & Logic for PCs, Servers & Motherboards 13 jun 2002
User guide CBT (5-V) And CBTLV (3.3-V) Bus Switches Data Book (Rev. B) 01 dic 1998

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Modelo de simulación

HSPICE Model for SN74CBTLV3257

SCDM133.ZIP (180 KB) - HSpice Model
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Modelo de simulación

SN74CBTLV3257 IBIS Model (Rev. A)

SCDM013A.ZIP (25 KB) - IBIS Model
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Paquete Pasadores Descargar
SOIC (D) 16 Ver opciones
SSOP (DBQ) 16 Ver opciones
TSSOP (PW) 16 Ver opciones
TVSOP (DGV) 16 Ver opciones
UQFN (RSV) 16 Ver opciones
VQFN (RGY) 16 Ver opciones
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Pedidos y calidad

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  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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