SBAC186 — Arria10 + ADC32RF44 Design
支援產品和硬體
產品
高速 ADC (≥10 MSPS)
- ADC32RF44 — 雙通道、14 位元、2.6-GSPS 射頻取樣類比轉數位轉換器 (ADC)
硬體開發
開發板
- ADC32RF80EVM — 適用於雙通道、14 位元、3-GSPS、射頻取樣寬頻接收器的 ADC32RF80 評估模組
The ADC32RF44 device is a 14-bit, 2.6-GSPS, dual-channel, analog-to-digital converter (ADC) that supports RF sampling with input frequencies up to 4 GHz and beyond. Designed for high signal-to-noise ratio (SNR), the ADC32RF44 delivers a noise spectral density of –154.2 dBFS/Hz as well as dynamic range and channel isolation over a large input frequency range. The buffered analog input with on-chip termination provides uniform input impedance across a wide frequency range and minimizes sample-and-hold glitch energy.
Each ADC channel can be connected to a dual-band, digital down-converter (DDC) with up to three independent, 16-bit numerically-controlled oscillators (NCOs) per DDC for phase-coherent frequency hopping. Additionally, the ADC is equipped with front-end peak and RMS power detectors and alarm functions to support external automatic gain control (AGC) algorithms.
The ADC32RF44 supports the JESD204B serial interface with subclass 1-based deterministic latency using data rates up to 12.5 Gbps with up to four lanes per ADC. The device is offered in a 72-pin VQFN package (10 mm × 10 mm) and supports the industrial temperature range (–40°C to +85°C).
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | ADC32RF44 Dual-Channel, 14-Bit, 2.6-GSPS, Analog-to-Digital Converter datasheet (Rev. A) | PDF | HTML | 2017年 3月 23日 |
| Application note | Spurs Analysis in the RF Sampling ADC | 2018年 2月 9日 | ||
| Application note | Configuration Files for ADC32RF45, ADC32RF83, and ADC32RF80 (Rev. B) | 2017年 9月 5日 |
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| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| VQFNP (RMP) | 72 | Ultra Librarian |
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。