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AFE7422

現行

2 發射、2 接收射頻取樣收發器，10-MHz 至 6-GHz、最大 1200-MHz IBW

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產品規格表

現在提供此產品的更新版本

open-in-new 比較替代產品
功能相同，但引腳輸出與所比較的裝置不同
AFE7903 現行 2 發射、2 接收射頻取樣收發器，5MHz 至 7.4GHz、最大 400MHz IBW Lower power and increased performance RF-sampling 2T2R

AFE7422

現行
產品規格表 立即訂購

產品詳細資料

Applications General purpose Number of TXs and RXs 2 TX Number of DUCs per TX 2 Number of DDCs per RX 2 RF frequency (max) (MHz) 6000 RF frequency (min) (MHz) 10 Operating temperature range (°C) -40 to 85 Rating Catalog
Applications General purpose Number of TXs and RXs 2 TX Number of DUCs per TX 2 Number of DDCs per RX 2 RF frequency (max) (MHz) 6000 RF frequency (min) (MHz) 10 Operating temperature range (°C) -40 to 85 Rating Catalog
FCBGA (ABJ) 400 289 mm² 17 x 17 FCBGA (ALK) 400 289 mm² 17 x 17
  • Two, 14-bit, 9-GSPS DACs
    • Up to 1200-MHz signal bandwidth
    • 1 DSA per channel tunes output power
  • Two, 14-Bit, 3-GSPS ADCs
    • Up to 1500-MHz signal bandwidth
    • NSD: –151 dBFS/Hz
    • AC performance at fIN = 2.6 GHz, –3 dBFS
      • SNR: 55 dBFS
      • SFDR: 73 dBc HD2 and HD3
      • SFDR: 91 dBc worst spur
    • 2 DSA per channel extends dynamic range
    • RF and digital power detectors
  • RF frequency range: 10 MHz to 6 GHz
  • Fast frequency hopping < 1 µs
  • Receive digital signal path:
    • Bypassable quad DDC per ADC
    • 3-phase coherent 32-bit NCOs per DDC
    • Decimation ratio: 2x to 32x
  • Transmit digital signal path:
    • Quad DUC per DAC with 32-bit NCOs
    • Interpolation ratio: 6x to 36x
    • Sin(x)/x correction and configurable delay
    • Power amplifier protection (PAP)
  • JESD204B interface:
    • 8 transceivers at up to 15 Gbps
    • Subclass 1 multichip synchronization
  • Clocks:
    • Internal PLL and VCO with bypass option
    • Clock output up to 3 GHz with clock divider
  • DAC power dissipation: 1.8 W/ch at 9 GSPS
  • ADC power dissipation: 1.9 W/ch at 3 GSPS
  • Package: 17-mm x 17-mm FC BGA, 0.8-mm pitch
  • Two, 14-bit, 9-GSPS DACs
    • Up to 1200-MHz signal bandwidth
    • 1 DSA per channel tunes output power
  • Two, 14-Bit, 3-GSPS ADCs
    • Up to 1500-MHz signal bandwidth
    • NSD: –151 dBFS/Hz
    • AC performance at fIN = 2.6 GHz, –3 dBFS
      • SNR: 55 dBFS
      • SFDR: 73 dBc HD2 and HD3
      • SFDR: 91 dBc worst spur
    • 2 DSA per channel extends dynamic range
    • RF and digital power detectors
  • RF frequency range: 10 MHz to 6 GHz
  • Fast frequency hopping < 1 µs
  • Receive digital signal path:
    • Bypassable quad DDC per ADC
    • 3-phase coherent 32-bit NCOs per DDC
    • Decimation ratio: 2x to 32x
  • Transmit digital signal path:
    • Quad DUC per DAC with 32-bit NCOs
    • Interpolation ratio: 6x to 36x
    • Sin(x)/x correction and configurable delay
    • Power amplifier protection (PAP)
  • JESD204B interface:
    • 8 transceivers at up to 15 Gbps
    • Subclass 1 multichip synchronization
  • Clocks:
    • Internal PLL and VCO with bypass option
    • Clock output up to 3 GHz with clock divider
  • DAC power dissipation: 1.8 W/ch at 9 GSPS
  • ADC power dissipation: 1.9 W/ch at 3 GSPS
  • Package: 17-mm x 17-mm FC BGA, 0.8-mm pitch

The AFE7422 is a dual-channel, wideband, RF-sampling analog front end (AFE) based on 14-bit, 9-GSPS DACs and 14-bit, 3-GSPS ADCs. With operation at an RF of up to 6 GHz, this device enables direct RF sampling into the C-band frequency range without the need for additional frequency conversions stages. This improvement in density and flexibility enables high-channel-count, multimission systems.

The DAC signal paths support interpolation and digital up conversion options that deliver up to 1200 MHz of signal bandwidth. The differential output path includes a digital step attenuator (DSA), which enables tuning of output power.

Each ADC input path includes a dual DSA and RF and Digital power detectors. Flexible decimation options provide optimization of data bandwidth and a decimation bypass mode is also available for widest signal bandwidth.

An 8-lane (8 TX + 8 RX) subclass-1 compliant JESD204B interface operates at up to 15 Gbps. A bypassable on-chip PLL simplifies clock operation with an optional clock output.

The AFE7422 is a dual-channel, wideband, RF-sampling analog front end (AFE) based on 14-bit, 9-GSPS DACs and 14-bit, 3-GSPS ADCs. With operation at an RF of up to 6 GHz, this device enables direct RF sampling into the C-band frequency range without the need for additional frequency conversions stages. This improvement in density and flexibility enables high-channel-count, multimission systems.

The DAC signal paths support interpolation and digital up conversion options that deliver up to 1200 MHz of signal bandwidth. The differential output path includes a digital step attenuator (DSA), which enables tuning of output power.

Each ADC input path includes a dual DSA and RF and Digital power detectors. Flexible decimation options provide optimization of data bandwidth and a decimation bypass mode is also available for widest signal bandwidth.

An 8-lane (8 TX + 8 RX) subclass-1 compliant JESD204B interface operates at up to 15 Gbps. A bypassable on-chip PLL simplifies clock operation with an optional clock output.
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* Data sheet AFE7422 Dual-channel, RF-sampling AFE with 14-bit, 9-GSPS DACs and 14-bit, 3-GSPS ADCs datasheet (Rev. A) PDF | HTML 2019年 1月 25日

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