產品詳細資料

Rating Catalog Architecture Gate driver Control interface 1xPWM, 3xPWM, 6xPWM Gate drive (A) 1 Vs (min) (V) 9 Vs ABS (max) (V) 102 Features Hardware Management I/F, SPI/I2C, Smart Gate Drive Operating temperature range (°C) -40 to 125 TI functional safety category Functional Safety Quality-Managed
Rating Catalog Architecture Gate driver Control interface 1xPWM, 3xPWM, 6xPWM Gate drive (A) 1 Vs (min) (V) 9 Vs ABS (max) (V) 102 Features Hardware Management I/F, SPI/I2C, Smart Gate Drive Operating temperature range (°C) -40 to 125 TI functional safety category Functional Safety Quality-Managed
WQFN (RTV) 32 25 mm² 5 x 5
  • 9 to 100-V, Triple half-bridge gate driver
    • Optional triple low-side current shunt amplifiers
  • Functional Safety Quality-Managed
    • Documentation available to aid IEC 61800-5-2 functional safety system design
  • Smart gate drive architecture
    • Adjustable slew rate control for EMI performance
    • VGS handshake and minimum dead-time insertion to prevent shoot-through
    • 50-mA to 1-A peak source current
    • 100-mA to 2-A peak sink current
    • dV/dt mitigation through strong pulldown
  • Integrated gate driver power supplies
    • High-side doubler charge pump For 100% PWM duty cycle control
    • Low-side linear regulator
  • Integrated triple current shunt amplifiers
    • Adjustable gain (5, 10, 20, 40 V/V)
    • Bidirectional or unidirectional support
  • 6x, 3x, 1x, and independent PWM modes
    • Supports 120° sensored operation
  • SPI or hardware interface available
  • Low-power sleep mode (20 µA at VVM = 48-V)
  • Integrated protection features
    • VM undervoltage lockout (UVLO)
    • Gate drive supply undervoltage (GDUV)
    • MOSFET VDS overcurrent protection (OCP)
    • MOSFET shoot-through prevention
    • Gate driver fault (GDF)
    • Thermal warning and shutdown (OTW/OTSD)
    • Fault condition indicator (nFAULT)
  • 9 to 100-V, Triple half-bridge gate driver
    • Optional triple low-side current shunt amplifiers
  • Functional Safety Quality-Managed
    • Documentation available to aid IEC 61800-5-2 functional safety system design
  • Smart gate drive architecture
    • Adjustable slew rate control for EMI performance
    • VGS handshake and minimum dead-time insertion to prevent shoot-through
    • 50-mA to 1-A peak source current
    • 100-mA to 2-A peak sink current
    • dV/dt mitigation through strong pulldown
  • Integrated gate driver power supplies
    • High-side doubler charge pump For 100% PWM duty cycle control
    • Low-side linear regulator
  • Integrated triple current shunt amplifiers
    • Adjustable gain (5, 10, 20, 40 V/V)
    • Bidirectional or unidirectional support
  • 6x, 3x, 1x, and independent PWM modes
    • Supports 120° sensored operation
  • SPI or hardware interface available
  • Low-power sleep mode (20 µA at VVM = 48-V)
  • Integrated protection features
    • VM undervoltage lockout (UVLO)
    • Gate drive supply undervoltage (GDUV)
    • MOSFET VDS overcurrent protection (OCP)
    • MOSFET shoot-through prevention
    • Gate driver fault (GDF)
    • Thermal warning and shutdown (OTW/OTSD)
    • Fault condition indicator (nFAULT)

The DRV835xF family of devices are highly-integrated gate drivers for three-phase brushless DC (BLDC) motor applications. The device variants provide optional integrated current shunt amplifiers to support different motor control schemes.

The DRV835xF uses smart gate drive (SGD) architecture to decrease the number of external components that are typically necessary for MOSFET slew rate control and protection circuits. The SGD architecture also optimizes dead time to prevent shoot-through conditions, provides flexibility in decreasing electromagnetic interference (EMI) by MOSFET slew rate control, and protects against gate short circuit conditions through VGS monitors. A strong gate pulldown circuit helps prevent unwanted dV/dt parasitic gate turn on events

Various PWM control modes (6x, 3x, 1x, and independent) are supported for simple interfacing to the external controller. These modes can decrease the number of outputs required of the controller for the motor driver PWM control signals. This family of devices also includes 1x PWM mode for simple sensored trapezoidal control of a BLDC motor by using an internal block commutation table.

The DRV835xF family of devices are highly-integrated gate drivers for three-phase brushless DC (BLDC) motor applications. The device variants provide optional integrated current shunt amplifiers to support different motor control schemes.

The DRV835xF uses smart gate drive (SGD) architecture to decrease the number of external components that are typically necessary for MOSFET slew rate control and protection circuits. The SGD architecture also optimizes dead time to prevent shoot-through conditions, provides flexibility in decreasing electromagnetic interference (EMI) by MOSFET slew rate control, and protects against gate short circuit conditions through VGS monitors. A strong gate pulldown circuit helps prevent unwanted dV/dt parasitic gate turn on events

Various PWM control modes (6x, 3x, 1x, and independent) are supported for simple interfacing to the external controller. These modes can decrease the number of outputs required of the controller for the motor driver PWM control signals. This family of devices also includes 1x PWM mode for simple sensored trapezoidal control of a BLDC motor by using an internal block commutation table.

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類型 標題 日期
* Data sheet DRV835xF 100-V Three-Phase Smart Gate Driver datasheet (Rev. B) PDF | HTML 2021年 8月 27日
Application brief 人形機器人的馬達控制 PDF | HTML 2025年 2月 5日
Application note Relating Payload to Brushless DC Motor Driver Specifications PDF | HTML 2024年 12月 2日
Application note System Design Considerations for High-Power Motor Driver Applications PDF | HTML 2021年 6月 22日
Functional safety information Design Smaller Safe Torque Off (STO) Systems Using 3-Phase Smart Gate Drivers PDF | HTML 2021年 3月 4日
Analog Design Journal Implementing STO functionality w/ diagnostic and monitoring for ind. motor drive 2019年 9月 30日

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開發板

DRV8350H-EVM — DRV8350H 三相智慧型閘極驅動器評估模組

DRV8350H-EVM 是以 DRV8350H 閘極驅動器和 CSD19532Q5B NexFET™ 電源塊為基礎的 15A、3 相無刷 DC 驅動級。

此模組具備獨立的 DC 匯流排和相位電壓感測,以及外部獨立低壓側電流分流放大器,使此評估模組成為無感測器 BLDC 演算法的最佳選擇。  此模組可透過 12V、0.35A 降壓式(降壓)穩壓器供電給 MCU 3.3V 及 5V 電源塊。  此驅動器可配置為分裂軌和單軌電源解決方案。此驅動平台具備 IDRIVE 配置、故障接腳,並可透過可配置硬體進行短路、過熱、擊穿和欠電壓保護。此 EVM 具備完整的 USB 轉 MCU (...)

使用指南: PDF
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開發板

DRV8350S-EVM — DRV8350S 三相智慧型閘極驅動器評估模組

DRV8350S-EVM 是一款 15A、三相無刷 DC 馬達驅動級,採用 DRV8350S 閘極驅動器與 CSD19532Q5B NexFET™ 電源塊。

此模組具備單獨立的 DC 匯流排和相位電壓感測,以及外部獨立低側電流分流放大器,使此評估模組成為無感測器 BLDC 演算法的最佳選擇。  此模組透過 12V、0.35A 降壓穩壓器供電給 MCU 3.3V 及 5V 電源塊。  此驅動器可配置為分軌和單軌電源解決方案。驅動平台具備 IDRIVE 配置,故障接腳,並可透過可配置的 SPI 保護短路,過熱,直通與欠電壓情況。EVM 具備完整 USB 轉 MCU 環境,能以可用的梯形驅動器韌體和 (...)

使用指南: PDF
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計算工具

BLDC-MAX-QG-MOSFET-CALCULATOR Calculate the maximum QG MOSFET for your motor driver

Calculate the maximum QG MOSFET that can be driven based on the PWM switching frequency, algorithm type, and additional external capacitance.
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產品
BLDC 驅動器
DRV8320 65 V 最大 3 相智慧型閘極驅動器 DRV8320R 具降壓穩壓器的 65-V 最大 3 相智慧型閘極驅動器 DRV8323 具電流分流放大器的 65-V 最大 3 相智慧型閘極驅動器 DRV8323R 具降壓穩壓器和電流分流放大器的 65V 最大三相智慧型閘極驅動器 DRV8329 具有單電流感測放大器的 60V 3 相閘極驅動器 DRV8329-Q1 具有單電流感測放大器的車用 60V 3 相閘極驅動器 DRV8334 具有準確電流感測功能的 60-V 1000-mA 至 2000-mA 3 相閘極驅動器 DRV8340-Q1 車用 12V 至 24V 電池 3 相智慧型閘極驅動器 DRV8343-Q1 具有電流分流放大器的車用 12V 至 24V 電池 3 相智慧型閘極驅動器 DRV8350 102V 最大三相智慧型閘極驅動器 DRV8350F 102-V 最大 3 相位功能安全品質管理智慧型閘極驅動器 DRV8350R 具降壓穩壓器的 102-V 最大 3 相智慧型閘極驅動器 DRV8353 具電流分流放大器的 102V 最大 3 相智慧型閘極驅動器 DRV8353F 具有 3x CSA 的 102-V 最大 3 相位功能安全品質管理智慧型閘極驅動器 DRV8353M 具有電流分流放大器和廣泛溫度的 102-V 最大 3 相智慧型閘極驅動器 DRV8353R 具降壓穩壓器和電流分流放大器的 102-V 最大 3 相智慧型閘極驅動器
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WQFN (RTV) 32 Ultra Librarian

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