PCA9544A
- 1-of-4 Bidirectional translating switches
- I2C Bus and SMBus compatible
- Four active-low interrupt inputs
- Active-low interrupt output
- Three address pins, allowing up to eight devices on the I2C Bus
- Channel selection via I2C Bus
- Power up with all switch channels deselected
- Low RON switches
- Allows voltage-level translation between 1.8-V, 2.5-V, 3.3-V, and 5-V Buses
- No glitch on power up
- Supports hot insertion
- Low standby current
- Operating power-supply voltage range of 2.3 V to 5.5 V
- 5.5-V Tolerant inputs
- 0 to 400-kHz Clock frequency
- Latch-up performance exceeds 100 mA Per JESD 78
- ESD Protection exceeds JESD 22
- 2000-V Human-body model (A114-A)
- 200-V Machine model (A115-A)
- 1000-V Charged-device model (C101)
The PCA9544A is a 4-channel, bidirectional translating multiplexer controlled via the I2C bus. The SCL/SDA upstream pair fans out to four downstream pairs, or channels. One SCL/SDA pair can be selected at a time, and this is determined by the contents of the programmable control register. Four interrupt inputs ( INT3– INT0), one for each of the downstream pairs, are provided. One interrupt output ( INT) acts as an AND of the four interrupt inputs.
A power-on reset function puts the registers in their default state and initializes the I2C state machine, with no channel selected.
The pass gates of the switches are constructed such that the VCC pin can be used to limit the maximum high voltage, which will be passed by the PCA9544A. This allows the use of different bus voltages on each pair, so that 1.8-V, 2.5-V, or 3.3-V parts can communicate with 5-V parts, without any additional protection. External pull-up resistors pull the bus up to the desired voltage level for each channel. All I/O pins are 5-V tolerant.
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | PCA9544A Low Voltage 4-Channel I2C and SMBus Multiplexer With Interrupt Logic datasheet (Rev. G) | PDF | HTML | 2021年 3月 11日 |
Application note | I2C Solutions for Hot Swap Applications (Rev. A) | 2023年 1月 31日 | ||
Application note | I2C Dynamic Addressing | 2019年 4月 25日 | ||
Selection guide | Logic Guide (Rev. AB) | 2017年 6月 12日 | ||
Application note | Choosing the Correct I2C Device for New Designs | PDF | HTML | 2016年 9月 7日 | |
Application note | Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) | 2015年 12月 2日 | ||
Application note | Understanding the I2C Bus | PDF | HTML | 2015年 6月 30日 | |
Application note | Maximum Clock Frequency of I2C Bus Using Repeaters | 2015年 5月 15日 | ||
Application note | I2C Bus Pull-Up Resistor Calculation | PDF | HTML | 2015年 2月 13日 | |
Application note | Troubleshooting I2C Bus Protocol | 2009年 10月 19日 | ||
Application note | Programming Fun Lights With TI's TCA6507 | 2007年 11月 30日 | ||
Application note | Semiconductor Packing Material Electrostatic Discharge (ESD) Protection | 2004年 7月 8日 |
設計與開發
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
I2C-DESIGNER — I2C 設計工具
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
SOIC (DW) | 20 | Ultra Librarian |
TSSOP (PW) | 20 | Ultra Librarian |
TVSOP (DGV) | 20 | Ultra Librarian |
VQFN (RGY) | 20 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。