PCA9544A
- 1-of-4 Bidirectional translating switches
- I2C Bus and SMBus compatible
- Four active-low interrupt inputs
- Active-low interrupt output
- Three address pins, allowing up to eight devices on the I2C Bus
- Channel selection via I2C Bus
- Power up with all switch channels deselected
- Low RON switches
- Allows voltage-level translation between 1.8-V, 2.5-V, 3.3-V, and 5-V Buses
- No glitch on power up
- Supports hot insertion
- Low standby current
- Operating power-supply voltage range of 2.3 V to 5.5 V
- 5.5-V Tolerant inputs
- 0 to 400-kHz Clock frequency
- Latch-up performance exceeds 100 mA Per JESD 78
- ESD Protection exceeds JESD 22
- 2000-V Human-body model (A114-A)
- 200-V Machine model (A115-A)
- 1000-V Charged-device model (C101)
The PCA9544A is a 4-channel, bidirectional translating multiplexer controlled via the I2C bus. The SCL/SDA upstream pair fans out to four downstream pairs, or channels. One SCL/SDA pair can be selected at a time, and this is determined by the contents of the programmable control register. Four interrupt inputs ( INT3– INT0), one for each of the downstream pairs, are provided. One interrupt output ( INT) acts as an AND of the four interrupt inputs.
A power-on reset function puts the registers in their default state and initializes the I2C state machine, with no channel selected.
The pass gates of the switches are constructed such that the VCC pin can be used to limit the maximum high voltage, which will be passed by the PCA9544A. This allows the use of different bus voltages on each pair, so that 1.8-V, 2.5-V, or 3.3-V parts can communicate with 5-V parts, without any additional protection. External pull-up resistors pull the bus up to the desired voltage level for each channel. All I/O pins are 5-V tolerant.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | PCA9544A Low Voltage 4-Channel I2C and SMBus Multiplexer With Interrupt Logic datasheet (Rev. G) | PDF | HTML | 2021/3/11 | ||
| 應用說明 | I2C Solutions for Hot Swap Applications (Rev. A) | 2023/1/31 | ||||
| 應用說明 | I2C Dynamic Addressing | 2019/4/25 | ||||
| 應用說明 | Choosing the Correct I2C Device for New Designs | PDF | HTML | 2016/9/7 | |||
| 應用說明 | Understanding the I2C Bus | PDF | HTML | 2015/6/30 | |||
| 應用說明 | Maximum Clock Frequency of I2C Bus Using Repeaters | 2015/5/15 | ||||
| 應用說明 | I2C Bus Pull-Up Resistor Calculation | PDF | HTML | 2015/2/13 | |||
| 應用說明 | Troubleshooting I2C Bus Protocol | 2009/10/19 |
設計與開發
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I2C-DESIGNER — I2C 設計工具
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| TSSOP (PW) | 20 | Ultra Librarian |
| TVSOP (DGV) | 20 | Ultra Librarian |
| SOIC (DW) | 20 | Ultra Librarian |
| VQFN (RGY) | 20 | Ultra Librarian |
訂購與品質
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。