SN5400

現行

產品詳細資料

沒有此產品的參數。
CDIP (J) 14 130.4652 mm² 19.56 x 6.67 CFP (W) 14 58.023 mm² 9.21 x 6.3
  • Package Options Include:
    • Plastic Small-Outline (D, NS, PS)
    • Shrink Small-Outline (DB)
    • Ceramic Flat (W)
    • Ceramic Chip Carriers (FK)
    • Standard Plastic (N)
    • Ceramic (J)
  • Also Available as Dual 2-Input Positive-NAND Gate in Small-Outline (PS) Package
  • Inputs Are TTL Compliant; VIH = 2 V and
    VIL = 0.8 V
  • Inputs Can Accept 3.3-V or 2.5-V Logic Inputs
  • SN5400, SN54LS00, and SN54S00 are Characterized For Operation Over the Full Military Temperature Range of –55ºC to 125ºC
  • Package Options Include:
    • Plastic Small-Outline (D, NS, PS)
    • Shrink Small-Outline (DB)
    • Ceramic Flat (W)
    • Ceramic Chip Carriers (FK)
    • Standard Plastic (N)
    • Ceramic (J)
  • Also Available as Dual 2-Input Positive-NAND Gate in Small-Outline (PS) Package
  • Inputs Are TTL Compliant; VIH = 2 V and
    VIL = 0.8 V
  • Inputs Can Accept 3.3-V or 2.5-V Logic Inputs
  • SN5400, SN54LS00, and SN54S00 are Characterized For Operation Over the Full Military Temperature Range of –55ºC to 125ºC

The SNx4xx00 devices contain four independent,
2-input NAND gates. The devices perform the Boolean function Y = A .B or Y = A + B in positive logic.

The SNx4xx00 devices contain four independent,
2-input NAND gates. The devices perform the Boolean function Y = A .B or Y = A + B in positive logic.

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重要文件 類型 標題 格式選項 日期
* Data sheet SNx400, SNx4LS00, and SNx4S00 Quadruple 2-Input Positive-NAND Gates datasheet (Rev. D) PDF | HTML 2017年 5月 19日

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