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TFP101A

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PanelBus DVI 接收器 86 MHz、HSYNC 修復

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產品規格表

TFP101A

不推薦在新設計中採用
產品規格表 立即訂購

產品詳細資料

Type Transceiver Rating Catalog Operating temperature range (°C) 0 to 70
Type Transceiver Rating Catalog Operating temperature range (°C) 0 to 70
HTQFP (PZP) 100 256 mm² (16 mm × 16 mm)
  • Supports XGA Resolution (Output Pixel Rates Up to 86 MHz)
  • Digital Visual Interface (DVI) Specification Compliant1
  • True-Color, 24 Bit/Pixel, 16.7M Colors at 1 or 2-Pixels Per Clock
  • Laser Trimmed Internal Termination Resistors for Optimum Fixed Impedance Matching
  • Skew Tolerant Up to One Pixel Clock Cycle
  • 4x Over-Sampling
  • Reduced Power Consumption – 1.8 V Core Operation With 3.3 V I/Os and Supplies2
  • Reduced Ground Bounce Using Time Staggered Pixel Outputs
  • Lowest Noise and Best Power Dissipation Using TI PowerPAD™ Packaging
  • Advanced Technology Using TI 0.18-µm EPIC-5™ CMOS Process
  • TFP101A Incorporates HSYNC Jitter Immunity3


PanelBus, PowerPAD and EPIC-5 are trademarks of Texas Instruments.
I2C is a licensed bus protocol from Phillips Semiconductor, Inc.

  1. The Digital Visual Interface Specification, DVI, is an industry standard developed by the Digital Display Working Group (DDWG) for high-speed digital connection to digital displays The TFP101 and TFP101A are compliant to the DVI Specification Rev. 1.0.
  2. The TFP101/101A has an internal voltage regulator that provides the 1.8-V core power supply from the externally supplied 3.3-V supplies.
  3. The TFP101A incorporates additional circuitry to create a stable HSYNC from DVI transmitters that introduce undesirable jitter on the transmitted HSYNC signal.
  • Supports XGA Resolution (Output Pixel Rates Up to 86 MHz)
  • Digital Visual Interface (DVI) Specification Compliant1
  • True-Color, 24 Bit/Pixel, 16.7M Colors at 1 or 2-Pixels Per Clock
  • Laser Trimmed Internal Termination Resistors for Optimum Fixed Impedance Matching
  • Skew Tolerant Up to One Pixel Clock Cycle
  • 4x Over-Sampling
  • Reduced Power Consumption – 1.8 V Core Operation With 3.3 V I/Os and Supplies2
  • Reduced Ground Bounce Using Time Staggered Pixel Outputs
  • Lowest Noise and Best Power Dissipation Using TI PowerPAD™ Packaging
  • Advanced Technology Using TI 0.18-µm EPIC-5™ CMOS Process
  • TFP101A Incorporates HSYNC Jitter Immunity3


PanelBus, PowerPAD and EPIC-5 are trademarks of Texas Instruments.
I2C is a licensed bus protocol from Phillips Semiconductor, Inc.

  1. The Digital Visual Interface Specification, DVI, is an industry standard developed by the Digital Display Working Group (DDWG) for high-speed digital connection to digital displays The TFP101 and TFP101A are compliant to the DVI Specification Rev. 1.0.
  2. The TFP101/101A has an internal voltage regulator that provides the 1.8-V core power supply from the externally supplied 3.3-V supplies.
  3. The TFP101A incorporates additional circuitry to create a stable HSYNC from DVI transmitters that introduce undesirable jitter on the transmitted HSYNC signal.

The Texas Instruments TFP101 and TFP101A are TI PanelBus™ flat panel display products, part of a comprehensive family of end-to-end DVI 1.0 compliant solutions. Targeted primarily at desktop LCD monitors and digital projectors, the TFP101/101A finds applications in any design requiring high-speed digital interface.

The TFP101/101A supports display resolutions up to XGA in 24-bit true color pixel format. The TFP101/101A offers design flexibility to drive one or two pixels per clock, supports TFT or DSTN panels, and provides an option for time staggered pixel outputs for reduced ground bounce.

PowerPAD™ advanced packaging technology results in best of class power dissipation, footprint, and ultra-low ground inductance.

The TFP101/101A combines PanelBus™ circuit innovation with TI’s advanced 0.18-µm EPIC-5™ CMOS process technology, along with TI PowerPAD™ package technology to achieve a reliable, low-powered, low noise, high-speed digital interface solution.

The Texas Instruments TFP101 and TFP101A are TI PanelBus™ flat panel display products, part of a comprehensive family of end-to-end DVI 1.0 compliant solutions. Targeted primarily at desktop LCD monitors and digital projectors, the TFP101/101A finds applications in any design requiring high-speed digital interface.

The TFP101/101A supports display resolutions up to XGA in 24-bit true color pixel format. The TFP101/101A offers design flexibility to drive one or two pixels per clock, supports TFT or DSTN panels, and provides an option for time staggered pixel outputs for reduced ground bounce.

PowerPAD™ advanced packaging technology results in best of class power dissipation, footprint, and ultra-low ground inductance.

The TFP101/101A combines PanelBus™ circuit innovation with TI’s advanced 0.18-µm EPIC-5™ CMOS process technology, along with TI PowerPAD™ package technology to achieve a reliable, low-powered, low noise, high-speed digital interface solution.
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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 TI PanelBus Digital Receiver datasheet (Rev. C) 2003/10/13
* 勘誤表 TFP101(A), TFP201(A), TFP401(A) Errata 2003/11/11
* 勘誤表 TFP101/A, TFP201/A, TFP401/A, TFP403 Data Sheet Errata 2003/6/27

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