SCPS299A May   2025  – September 2025 TXE8116-Q1 , TXE8124-Q1

ADVANCE INFORMATION  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 SPI Bus Timing Requirements
    8. 5.8 Switching Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 I/O Port
      2. 7.3.2 Interrupt Output (INT)
      3. 7.3.3 Reset Input (RESET)
      4. 7.3.4 Fail-safe Mode
      5. 7.3.5 Software Reset Call
      6. 7.3.6 Burst Mode
      7. 7.3.7 Daisy Chain
      8. 7.3.8 Multi Port
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power-On Reset
    5. 7.5 Programming
      1. 7.5.1 SPI Interface
      2. 7.5.2 SPI Data Format
      3. 7.5.3 Writes
      4. 7.5.4 Reads
    6. 7.6 Register Maps
      1. 7.6.1 Control Register: Read/Write and Feature Address (B23 - B16)
      2. 7.6.2 Control Register: Port Selection and Multi Port (B15 - B8)
      3. 7.6.3 Register Descriptions
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Power Supply Recommendations
      1. 8.2.1 Power-On Reset Requirements
    3. 8.3 Layout
      1. 8.3.1 Layout Guidelines
      2. 8.3.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Electrical Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS VCC MIN TYP MAX UNIT
VIK Input diode clamp voltage II = –18mA VCC –1.2 V
VPORR Power-on reset voltage, VCC rising VI = VCC or GND, IO = 0 VCC 1.35 V
VPORF Power-on reset voltage, VCC falling 1.05 V
VOH High-level output voltage(1) P Port IOH = -4mA 1.65V 1.31 V
IOH = -8mA 2.3V 1.73
3V 2.4
4.5V 4.0
5.5V 4.95
VOH High-level output voltage(1) SDO IOH = -3mA 1.65V to 5.5V VCC - 0.4 V
VOL Low-level output voltage P Ports IOL = 4mA 1.65V 0.22 V
IOL = 8mA 2.3V 0.36
3V 0.25
4.5V 0.17
5.5V 0.15
VOL Low-level output voltage SDO IOL = 3mA 1.65V to 5.5V 0.4 V
IOL Low-level output current INT VOL = 0.4V 1.65V to 5.5V 4 mA
II Input leakage current P Ports VI = VCC or GND 1.65V to 5.5V ±1 µA
VI = 3.6V 0V ±1
SDI, RESET VI = VCC or GND 1.65V to 5.5V ±1
II Input leakage current SCLK VI = GND 1.65V to 5.5V ±1 µA
II Input leakage current SCLK VI = VCC 1.65V to 5.5V ±65 µA
II Input leakage current CS VI = VCC 1.65V to 5.5V ±1 µA
II Input leakage current CS VI = GND 1.65V to 5.5V ±65 µA
ICC Quiescent current Standby mode SDI, CS and RESET = VCC,
P port = VCC or GND,
I/O = inputs, IO = 0mA
fSCLK = 0MHz, 
–40°C < TA ≤ 85°C, I/O resistors disabled
5.5V 2.3 8 µA
3.6V 2 7.5 µA
2.7V 1.8 7.2 µA
1.65V to 1.95V 1.7 7 µA
SDI, CS and RESET = VCC,
P port = VCC or GND,
I/O = inputs, IO = 0mA
fSCLK = 0MHz, 
–40°C < TA ≤ 125°C, I/O resistors disabled
5.5V 2.3 26 µA
3.6V 2 24
2.7V 1.8 23.6
1.65V to 1.95V 1.7 23.4
ICC Active current Active mode (5MHz) SDI, CS and RESET = VCC,
P port = VCC or GND,
I/O = inputs, IO = 0mA
fSCLK = 5MHz, 100pF load on SDO
–40°C < TA ≤ 125°C, I/O resistors disabled
5.5V 150 170 µA
3.6V 132 140
2.7V 127 135
1.65V to 1.95V 124 130
Active mode (10MHz) SDI, CS and RESET = VCC,
P port = VCC or GND,
I/O = inputs, IO = 0mA
fSCLK = 10MHz, 100pF load on SDO
–40°C < TA ≤ 125°C, I/O resistors disabled
5.5V 292 350 µA
3.6V 257 285
2.7V 240 270
1.65V to 1.95V 242 260
IBHL Bus-hold low sustaining current VI = 0.58 1.65V 35 uA
VI = 0.70 2.3V 50
VI = 0.80 3V 60
VI = 1.35 4.5V 105
IBHH Bus-hold high sustaining current VI = 1.07 1.65V -75 uA
VI = 1.70 2.3V -85
VI = 2.00 3V -140
VI = 3.15 4.5V -180
IBHLO Bus-hold low overdrive current Ramp input voltage from 0to Vcc 1.95V 170 uA
2.7V 260
3.6V 340
5.5V 500
IBHHO Bus-hold high overdrive current Ramp input voltage from Vcc to 0 1.95V -170 uA
2.7V -260
3.6V -340
5.5V -500
Rpu(int) internal pull-up resistance CS 70 100 140
P port 70 100 140
Rpd(int) internal pull-down resistance P port 70 100 140
SCLK 70 100 140
CI Input pin capacitance SCLK VI = VCC or GND 1.65V to 5.5V 8 pF
SDI 8 pF
CS 8 pF
RESET 8 pF
CIO Input-output pin capacitance P port VIO = VCC or GND 1.65V to 5.5V 8.5 pF
Each I/O must be externally limited to a maximum of 10mA