SLVUCI2A March   2023  – May 2025 AM68 , AM68A , AM69 , AM69A , TDA4AH-Q1 , TDA4AL-Q1 , TDA4AP-Q1 , TDA4APE-Q1 , TDA4VE-Q1 , TDA4VH-Q1 , TDA4VL-Q1 , TDA4VP-Q1 , TDA4VPE-Q1 , TPS6594-Q1

 

  1.   1
  2.   TPS6594133A-Q1 PMIC User Guide for Jacinto J784S4 or J721S2, PDN-3A, PDN-3B, PDN-3F
  3.   Trademarks
  4. 1Introduction
  5. 2Processor Connections
    1. 2.1 Power Mapping
    2. 2.2 Control Mapping
  6. 3Supporting Functional Safety Systems
    1. 3.1 Achieving ASIL-B System Requirements
    2. 3.2 Achieving up to ASIL-D System Requirements
  7. 4Static NVM Settings
    1. 4.1  Application-Based Configuration Settings
    2. 4.2  Device Identification Settings
    3. 4.3  BUCK Settings
    4. 4.4  LDO Settings
    5. 4.5  VCCA Settings
    6. 4.6  GPIO Settings
    7. 4.7  Finite State Machine (FSM) Settings
    8. 4.8  Interrupt Settings
    9. 4.9  POWERGOOD Settings
    10. 4.10 Miscellaneous Settings
    11. 4.11 Interface Settings
    12. 4.12 Multi-Device Settings
    13. 4.13 Watchdog Settings
  8. 5Pre-Configurable Finite State Machine (PFSM) Settings
    1. 5.1 Configured States
    2. 5.2 PFSM Triggers
    3. 5.3 Power Sequences
      1. 5.3.1 TO_SAFE_SEVERE and TO_SAFE
      2. 5.3.2 TO_SAFE_ORDERLY and TO_STANDBY
      3. 5.3.3 ACTIVE_TO_WARM
      4. 5.3.4 ESM_SOC_ERROR
      5. 5.3.5 PWR_SOC_ERROR
      6. 5.3.6 MCU_TO_WARM
      7. 5.3.7 TO_MCU
      8. 5.3.8 TO_ACTIVE
      9. 5.3.9 TO_RETENTION
  9. 6Application Examples
    1. 6.1 Initialization
    2. 6.2 Moving Between States; ACTIVE, MCU ONLY and RETENTION
      1. 6.2.1 ACTIVE
      2. 6.2.2 MCU ONLY
      3. 6.2.3 RETENTION
    3. 6.3 Entering and Exiting Standby
    4. 6.4 Entering and Existing LP_STANDBY
  10. 7Impact of NVM Changes
  11. 8References
  12. 9Revision History

4.1 Application-Based Configuration Settings

In the TPS6594133A data sheet, there are seven application-based configurations for each BUCK to operate within. The following list includes the different configurations available:

  • 4.4MHz VOUT Less than 1.9V, Multiphase or High COUT Single Phase
  • 2.2MHz Single Phase for DDR Termination
  • 4.4MHz VOUT Less than 1.9V, Low COUT, Single Phase Only
  • 4.4MHz VOUT Greater than 1.7V, Single Phase Only
  • 2.2MHz Full VOUT Range and VIN Greater than 4.5V, Single Phase Only
  • 2.2MHz VOUT Less than 1.9V Multiphase or Single Phase
  • 2.2MHz Full VOUT and Full VIN Range, Single Phase Only

The seven configurations also have optimal output inductance values that optimize the performance of each buck under these various conditions. Table 4-1 shows the default configurations for the BUCKs. The loop parameters associated with the use cases cannot be changed after device startup.

Table 4-1 Application Use Case Settings
Device BUCK Rail Default Application Use Case Recommended Inductor Value
TPS6594133A-Q1 BUCK1 4.4MHz VOUT Less than 1.9V, Multiphase 220nH
BUCK2 4.4MHz VOUT Less than 1.9V, Multiphase 220nH
BUCK3 4.4MHz VOUT Less than 1.9V, Low COUT, Single Phase Only 220nH
BUCK4 4.4MHz VOUT Less than 1.9V, Low COUT, Single Phase Only 220nH
BUCK5 4.4MHz VOUT Less than 1.9V, Low COUT, Single Phase Only 220nH