SLVUCI2A March   2023  – May 2025 AM68 , AM68A , AM69 , AM69A , TDA4AH-Q1 , TDA4AL-Q1 , TDA4AP-Q1 , TDA4APE-Q1 , TDA4VE-Q1 , TDA4VH-Q1 , TDA4VL-Q1 , TDA4VP-Q1 , TDA4VPE-Q1 , TPS6594-Q1

 

  1.   1
  2.   TPS6594133A-Q1 PMIC User Guide for Jacinto J784S4 or J721S2, PDN-3A, PDN-3B, PDN-3F
  3.   Trademarks
  4. 1Introduction
  5. 2Processor Connections
    1. 2.1 Power Mapping
    2. 2.2 Control Mapping
  6. 3Supporting Functional Safety Systems
    1. 3.1 Achieving ASIL-B System Requirements
    2. 3.2 Achieving up to ASIL-D System Requirements
  7. 4Static NVM Settings
    1. 4.1  Application-Based Configuration Settings
    2. 4.2  Device Identification Settings
    3. 4.3  BUCK Settings
    4. 4.4  LDO Settings
    5. 4.5  VCCA Settings
    6. 4.6  GPIO Settings
    7. 4.7  Finite State Machine (FSM) Settings
    8. 4.8  Interrupt Settings
    9. 4.9  POWERGOOD Settings
    10. 4.10 Miscellaneous Settings
    11. 4.11 Interface Settings
    12. 4.12 Multi-Device Settings
    13. 4.13 Watchdog Settings
  8. 5Pre-Configurable Finite State Machine (PFSM) Settings
    1. 5.1 Configured States
    2. 5.2 PFSM Triggers
    3. 5.3 Power Sequences
      1. 5.3.1 TO_SAFE_SEVERE and TO_SAFE
      2. 5.3.2 TO_SAFE_ORDERLY and TO_STANDBY
      3. 5.3.3 ACTIVE_TO_WARM
      4. 5.3.4 ESM_SOC_ERROR
      5. 5.3.5 PWR_SOC_ERROR
      6. 5.3.6 MCU_TO_WARM
      7. 5.3.7 TO_MCU
      8. 5.3.8 TO_ACTIVE
      9. 5.3.9 TO_RETENTION
  9. 6Application Examples
    1. 6.1 Initialization
    2. 6.2 Moving Between States; ACTIVE, MCU ONLY and RETENTION
      1. 6.2.1 ACTIVE
      2. 6.2.2 MCU ONLY
      3. 6.2.3 RETENTION
    3. 6.3 Entering and Exiting Standby
    4. 6.4 Entering and Existing LP_STANDBY
  10. 7Impact of NVM Changes
  11. 8References
  12. 9Revision History

Revision History

Changes from Revision * (March 2023) to Revision A (May 2025)

  • Updated abstractGo
  • Added information about PDN-3A.I for industrial applicationsGo
  • Updated TI_NVM_REV to 0x5Go
  • Changed LDO2_PG_WINDOW from ± 5% to ± 10%Go
  • Updated GPIO9 default settings to reflect NVM revision changesGo
  • Added note about PFSM usage of SCRATCH_PAD_1 and SCRATCH_PAD_4Go
  • Updated Watchdog Settings for latest NVM revision.Go
  • Updated list of configured powered states to include the Wait4Enable stateGo
  • Updated PFSM Mission States and Transistions diagram to include the Wait4Enable stateGo
  • Added 500us delay from BUCK5 to LDO3 in TO_ACTIVE sequence diagram Go
  • Added note about WKUP1 signal for Retention mode exit.Go
  • Added table describing impact of NVM revision changesGo