SPRUIF3B May 2017 – March 2019 DRA790 , DRA791 , DRA793 , DRA797
Figure 8 is part of the SoC pinmux table for the GPMC. The SoC device supports additional functions not shown in the table. The functions shown are intended to reflect those supported on the EVM. These functions include:
Mux A: Selects between NOR and QSPI memory support. The MUX is implemented using resistors. This was due to the signal rate and routing restrictions of the QSPI device. To enable the GPMC signals to NOR (shown in red), the board must be modified to move resistors. Figure 9 shows the MUX diagram for GPMC and QSPI.