SPRUJF7 March   2025

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   5
  6. 1Evaluation Module Overview
    1. 1.1 Introduction
      1.      Preface: Read This First
      2. 1.1.1 Sitara MCU+ Academy
      3. 1.1.2 Important Usage Notes
    2. 1.2 Kit Contents
    3. 1.3 Specification
      1. 1.3.1 Component Identification
      2. 1.3.2 Functional Block Diagram
    4. 1.4 Device Information
  7. 2Hardware
    1. 2.1  Additional Images
    2. 2.2  Setup
    3. 2.3  Power Requirements
      1. 2.3.1 Power Tree
      2. 2.3.2 Power Sequence
    4. 2.4  Header Information
      1. 2.4.1 Baseboard Headers (J1, J2, J3)
      2. 2.4.2 HSEC Pinout
      3. 2.4.3 XDS Debug Header (J4)
      4. 2.4.4 FSI Header
      5. 2.4.5 OSPI Expansion Connector
      6. 2.4.6 Ethernet Add-on Board Connector
    5. 2.5  Reset
    6. 2.6  Clock
    7. 2.7  GPIO Mapping
    8. 2.8  Interfaces
      1. 2.8.1 USB
      2. 2.8.2 UART
      3. 2.8.3 FSI
      4. 2.8.4 OSPI
      5. 2.8.5 Ethernet
        1. 2.8.5.1 RGMII
        2. 2.8.5.2 PRU-ICSS
          1. 2.8.5.2.1 On-Board PHY
          2. 2.8.5.2.2 Ethernet Add-on Board
      6. 2.8.6 I2C
      7. 2.8.7 SPI
      8. 2.8.8 TMDSHSECDOCK-AM263 Peripherals
        1. 2.8.8.1 ADC/DAC
        2. 2.8.8.2 MCAN
        3. 2.8.8.3 LIN1
        4. 2.8.8.4 JTAG
        5. 2.8.8.5 GPIO
    9. 2.9  Debug Information
    10. 2.10 Test Points
    11. 2.11 Assembly Instructions
    12. 2.12 Best Practices
  8. 3Software
  9. 4Hardware Design Files
  10. 5Additional Information
    1. 5.1 Trademarks
  11. 6References
    1. 6.1 Other TI Components Used in This Design
  12. 7Revision History

2.8.1 USB

The HSEC180ADAPEVM-AM2 has one USB2.0 interface connected to the USB0 peripheral on the AM261x MCU. On the AM261x controlSOM, the USB signals are routed from the MCU to the SOM HD Connector J2.

On the SOM to HSEC adapter board, the USB0_DM and USB0_DP nets are routed to a common mode choke to reduce noise on the high-speed USB signal bus. The nets are passed through a TPD4E02B04 ESD protection diode, and are terminated at a Micro-USB receptacle. Figure 2-8 details the USB implementation on the HSEC180ADAPEVM-AM2.

HSEC180ADAPEVM-AM2 HSEC180ADAPEVM-AM2 USB Interface Figure 2-8 HSEC180ADAPEVM-AM2 USB Interface

The USB mode of operation is controlled using a set of DIP switches - SW1 and SW2. The setting of the DIP switches determines the USB mode of operation, and is detailed in Table 2-8 below.

Table 2-8 USB Mode Switch Settings
SW1 (USB0_DRVVBUS) SW2 (USBMICROAB_ID) USB Mode
OFF / RIGHT (TPS2051B disabled) ON / RIGHT (3V3) Device Mode
ON / LEFT (TPS2051B enabled) OFF / LEFT (GND) Host Mode
HSEC180ADAPEVM-AM2 SW1/SW2 Positions Figure 2-9 SW1/SW2 Positions

USB Device Mode

When using the AM261x device in USB device mode, the VBUS pin of the Micro-USB receptacle is used to detect when voltage has been applied to or removed from the USB connector. Software running on the AM261x manages the internal USB PHY according to the presence of 5V or 0V on the VBUS pin.

USB Host Mode

When using the AM261x device in USB Host mode, 5V on the VBUS pin of the Micro-USB receptacle is required. On the HSEC180ADAPEVM-AM2, this supply is generated using a TPS2051B USB Power Distribution switch which sources the main 5V system input from the HSEC connector and supplies a separate 5V input for the USB bus. As shown in Table 2-8 above, SW1 must be set to ON to enable the TPS2051B USB Power Distribution switch, and SW2 must be OFF to indicate that the device is set to USB Host mode. SW1 controls the state of the USB0_DRVVBUS net, which is connected to a dedicated USB0_DRVVBUS pin on the AM261x MCU and drives the enable pin on the TPS2051B. The OC pin of the TPS2051B is an active low, open-drain output that occurs when an overcurrent or overtemperature shutdown condition is detected. The USB0_VBUS_OC net is connected to the UART2_TXD pin on the AM261x MCU and is configured as a GPIO for this use case.