SPRUJF7 March   2025

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   5
  6. 1Evaluation Module Overview
    1. 1.1 Introduction
      1.      Preface: Read This First
      2. 1.1.1 Sitara MCU+ Academy
      3. 1.1.2 Important Usage Notes
    2. 1.2 Kit Contents
    3. 1.3 Specification
      1. 1.3.1 Component Identification
      2. 1.3.2 Functional Block Diagram
    4. 1.4 Device Information
  7. 2Hardware
    1. 2.1  Additional Images
    2. 2.2  Setup
    3. 2.3  Power Requirements
      1. 2.3.1 Power Tree
      2. 2.3.2 Power Sequence
    4. 2.4  Header Information
      1. 2.4.1 Baseboard Headers (J1, J2, J3)
      2. 2.4.2 HSEC Pinout
      3. 2.4.3 XDS Debug Header (J4)
      4. 2.4.4 FSI Header
      5. 2.4.5 OSPI Expansion Connector
      6. 2.4.6 Ethernet Add-on Board Connector
    5. 2.5  Reset
    6. 2.6  Clock
    7. 2.7  GPIO Mapping
    8. 2.8  Interfaces
      1. 2.8.1 USB
      2. 2.8.2 UART
      3. 2.8.3 FSI
      4. 2.8.4 OSPI
      5. 2.8.5 Ethernet
        1. 2.8.5.1 RGMII
        2. 2.8.5.2 PRU-ICSS
          1. 2.8.5.2.1 On-Board PHY
          2. 2.8.5.2.2 Ethernet Add-on Board
      6. 2.8.6 I2C
      7. 2.8.7 SPI
      8. 2.8.8 TMDSHSECDOCK-AM263 Peripherals
        1. 2.8.8.1 ADC/DAC
        2. 2.8.8.2 MCAN
        3. 2.8.8.3 LIN1
        4. 2.8.8.4 JTAG
        5. 2.8.8.5 GPIO
    9. 2.9  Debug Information
    10. 2.10 Test Points
    11. 2.11 Assembly Instructions
    12. 2.12 Best Practices
  8. 3Software
  9. 4Hardware Design Files
  10. 5Additional Information
    1. 5.1 Trademarks
  11. 6References
    1. 6.1 Other TI Components Used in This Design
  12. 7Revision History

2.4.6 Ethernet Add-on Board Connector

The HSEC180ADAPEVM-AM2 has a 48-pin high-density shielded connector (DF40GB-48DP-0.4V(58)) for connecting a supported TI Ethernet Add-on Board, such as the DP83826-EVM-AM2.

The PR0_PRU1 instance of the AM261x PRU-ICSS core is routed to the Ethernet add-on board Connector to be used as MII Ethernet. The connector pinout is standard across TI EVMs that support Ethernet add-on boards, and is detailed in Table 2-6 below.

Table 2-6 DF40GB Header Pinout
Pin # AM261x EVM Connection Ethernet Add-on Board Standard Description Description Ethernet Add-on Board Standard AM261x EVM Connection Pin #
1 GND GND Ground PMIC External Voltage Monitor EXT_VMON EXT_VMON2 2
3 ICSSM_MII_TXD0 TX_CLK Transmit Clock 2.5V supply VDD_2V5 VDD_ETH_2V5 4
5 GND GND Ground 2.5V supply VDD_2V5 VDD_ETH_2V5 6
7 ICSSM_MII_TXD0 TX_D0 Transmit Data 0 Ground GND GND 8
9 ICSSM_MII_TXD1 TX_D1 Transmit Data 1 Interrupt To Ethernet PHY PWDN/INTn MII1_INTn (GPIO119) 10
11 ICSSM_MII_TXD2 TX_D2 Transmit Data 2 Reset input to Ethernet PHY RESETn MII0/MII1_RST 12
13 ICSSM_MII_TXD3 TX_D3 Transmit Data 3 Collision Detected COL ICSSM_MII1_COL 14
15 GND GND Ground Ground GND GND 16
17 GND GND Ground Ground GND GND 18
19 ICSSM_MII1_RXCLK RX_CLK Receive Clock MDIO Clock MDIO_MDC PR0_MDIO0_MDC 20
21 GND GND Ground MDIO Data MDIO_MDIO PR0_MDIO0_MDIO 22
23 ICSSM_MII1_RXD0 RX_D0 Receive Data 0 Ground GND GND 24
25 ICSSM_MII1_RXD1 RX_D1 Receive Data 1 Inhibit INH GND 26
27 ICSSM_MII1_RXD2 RX_D2 Receive Data 2 PRUx Reference Clock REF_CLK PHY1_25MHZ_CLK 28
29 ICSSM_MII1_RXD3 RX_D3 Receive Data 3 Carrier Sense CRS ICSSM_MII1_CRS 30
31 GND GND Ground Ground GND GND 32
33 GND GND Ground Ground GND GND 34
35 ICSSM_MII1_TXEN TXEN Transmit Enable Board Connection Detect BRD_CONN_DET 3V3_LDO2 36
37 MII_EEPROM_A2 EEPROM_A2 EEPROM I2C Address bit [2] IEEE 1588 SFD 1588_SFD TP12 38
39 ICSSM_MII1_RXER RX_ER Receive Data Error I2C Clock I2C_SCL I2C0_SCL 40
41 GND GND Ground I2C Data I2C_SDA I2C0_SDA 42
43 ICSSM_MII1_RXLINK RX_LINK Receive Indicator IO Voltage Supply VDDIO VDDIO_3V3 44
45 ICSSM_MII1_RXDV RXDV Receive Data Valid IO Voltage Supply VDDIO VDDIO_3V3 46
47 MII1_EEPROM_A0 EEPROM_A0 EEPROM I2C Address bit [0] Audio Bit Clock GPIO_2/CLKOUT - 48

For more information, see Section 2.8.5.2.2.