Home Interface LVDS, M-LVDS & PECL ICs

SN65LVDS4

ACTIVE
Order now

500-Mbps LVDS single high-speed transceiver

Data sheet
Top
500-Mbps LVDS single high-speed transceiver

SN65LVDS4

ACTIVE
Data sheet Order now

Product details

Parameters

Function Receiver Protocols LVDS Number of transmitters 0 Number of receivers 1 Supply voltage (V) 1.8, 2.5 Signaling rate (Mbps) 500 Input signal LVDS Output signal LVTTL, LVCMOS Rating Catalog Operating temperature range (C) -40 to 85 open-in-new Find other LVDS, M-LVDS & PECL ICs

Package | Pins | Size

UQFN (RSE) 10 3 mm² 2 x 1.5 open-in-new Find other LVDS, M-LVDS & PECL ICs

Features

  • Designed for Signaling Rates(1) up to:
    • 500-Mbps Receiver
  • Operates From a 1.8-V or 2.5-V Core Supply
  • Available in 1.5-mm × 2-mm UQFN Package
  • Bus-Terminal ESD Exceeds 2 kV (HBM)
  • Low-Voltage Differential Signaling With Typical
    Output Voltages of 350 mV Into a 100-Ω Load
  • Propagation Delay Times
    • 2.1 ns Typical Receiver
  • Power Dissipation at 250 MHz
    • 40 mW Typical
  • Requires External Failsafe
  • Differential Input Voltage Threshold Less Than 50
    mV
  • Can Provide Output Voltage Logic Level (3.3-V
    LVTTL, 2.5-V LVCMOS, 1.8-V LVCMOS) Based
    on External VDD Pin, Thus Eliminating External
    LevelTranslation
 open-in-new Find other LVDS, M-LVDS & PECL ICs

Description

The SN65LVDS4 is a single, low-voltage, differential line receiver in a small-outline UQFN package.

 open-in-new Find other LVDS, M-LVDS & PECL ICs
Download

Technical documentation

star = Top documentation for this product selected by TI
No results found. Please clear your search and try again.
View all 9
Type Title Date
* Data sheet SN65LVDS4 1.8-V High-Speed Differential Line Receiver datasheet (Rev. A) Nov. 30, 2015
Application note How to Use a 3.3-V LVDS Buffer as a Low-Voltage LVDS Driver Jan. 09, 2019
Application note How to Support 1.8-V Signals Using a 3.3-V LVDS Driver/Receiver + Level-Shifter Dec. 28, 2018
Application note LVDS to Improve EMC in Motor Drives Sep. 27, 2018
Application note How Far, How Fast Can You Operate LVDS Drivers and Receivers? Aug. 03, 2018
Application note How to Terminate LVDS Connections with DC and AC Coupling May 16, 2018
Application note TMDS Clock Detection Solution in HDMI Sink Applications Aug. 23, 2017
Technical article Get Connected: High-speed LVDS comparator Jun. 03, 2015
User guide SN65LVDS4 Evaluation Module Jul. 15, 2011

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARD Download
document-generic User guide
2499
Description

The DDC2256AEVM evaluation module  (EVM)  is  an  evaluation  kit  for the DDC2256A,  a  256-channel,  current  input,  24-bit analog-to-digital (A/D) converter. The EVM kit, comprised of a DUT board and a capture board, contains two DDC2256A (...)

Features
  • All-in-one solution for evaluating two DDC2256A devices in a system-like setting
  • On-board FPGA, memory, and USB interface allow for data capture and analysis of large sample datasets
  • Flexible supply configurations for simple or advanced experimentation
  • Various input voltage configurations allow for (...)
View details
EVALUATION BOARD Download
document-generic User guide
49
Description
Evaluation Module for SN65LVDS4
Features
  • SN65LVDS4EVM Motherboard Features
  • Signaling Rate up to 500 Mbps Differential Line Receiver
  • Runs from a 1.8V or 2.5V core supply
  • Can provide output voltage logic levels based on an external VDD pin
  • Enables the system designer to connect 50-Ω coaxial cables via SMA connectors at the inputs and an SMA or (...)
View details

Design tools & simulation

SIMULATION MODEL Download
SLLM150.ZIP (131 KB) - IBIS Model
SIMULATION TOOL Download
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
View details
SIMULATION TOOL Download
SPICE-based analog simulation program
TINA-TI — TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
document-generic User guide

Reference designs

参考设计 Download
20-bit, 1-MSPS Isolator Optimized Data Acquisition Reference Design Maximizing SNR and Sample Rate
TIDA-01037 — TIDA-01037 is a 20-bit, 1 MSPS isolated analog input data acquisition reference design that utilizes two different isolator devices to maximize signal chain SNR and sample rate performance. For signals requiring low jitter, such as ADC sampling clocks, TI’s ISO73xx family of low jitter devices (...)
document-generic Schematic
参考设计 Download
Wideband Receiver Reference Design for Upstream DOCSIS 3.1 Applications
TIDA-01378 — This reference design consists of an analog front-end (AFE) signal chain for wideband receiver applications using the LMH2832 digitally controlled variable gain amplifier (DVGA) and ADS54J40 analog-to-digital converter (ADC). The design is primarily targeted for upstream DOCSIS 3.1 receiver (...)
document-generic Schematic
参考设计 Download
16-Bit 1-GSPS Digitizer Reference Design with AC and DC Coupled Fixed Gain Amplifier
TIDA-00823 — This reference design discusses the use and performance of the Ultra-Wideband, Fixed-gain high-speed amplifier, the LMH3401 to drive the high-speed analog-to-digital converter (ADC), the ADS54J60 device. Different options for common-mode voltages, power supplies, and interfaces are discussed and (...)
document-generic Schematic
参考设计 Download
18-bit, 2-Msps Isolated Data Acquisition Reference Design to Achieve Maximum SNR and Sampling Rate
TIDA-00732 — This “18-bit, 2-Msps Isolated Data Acquisition Reference Design to achieve maximum SNR and sampling rate”  illustrates how to overcome performance-limiting challenges typical of isolated data acquisition system design:
  • Maximizing sampling rate by minimizing propagation delay introduced by digital (...)
document-generic Schematic
参考设计 Download
16-Bit 1-GSPS Digitizer Reference Design with AC and DC Coupled Variable Gain Amplifier
TIDA-00822 — This reference design discusses the use and performance of the Digital Variable-Gain high-speed amplifier, the LMH6401, to drive the high-speed analog-to-digital converter (ADC), the ADS54J60 device. Different options for common-mode voltages, power supplies, and interfaces are discussed and (...)
document-generic Schematic

CAD/CAE symbols

Package Pins Download
UQFN (RSE) 10 View options

Ordering & quality

Information included:
  • RoHS
  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring

Recommended products may have parameters, evaluation modules or reference designs related to this TI product.

Support & training

TI E2E™ forums with technical support from TI engineers

View all forum topics

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

Training series

View all TI training and videos

Videos