Top

Product details

Parameters

Features Buffer, Enable Pin Frequency (Max) (kHz) 400 VCCA (Min) (V) 0.9 VCCA (Max) (V) 5.5 VCCB (Min) (V) 2.7 VCCB (Max) (V) 5.5 Supply restrictions VCCA <= VCCB Rating Catalog Operating temperature range (C) -40 to 85 open-in-new Find other I2C level shifters, buffers & hubs

Package | Pins | Size

SOIC (D) 8 19 mm² 4.9 x 3.9 VSSOP (DGK) 8 15 mm² 3 x 4.9 open-in-new Find other I2C level shifters, buffers & hubs

Features

  • Two-Channel Bidirectional Buffer
  • I2C Bus and SMBus Compatible
  • Operating Supply Voltage Range of 0.9 V to 5.5 V on A-side
  • Operating Supply Voltage Range of 2.7 V to 5.5 V on B-side
  • Voltage-Level Translation From 0.9 V - 5.5 V to 2.7 V - 5.5 V
  • Footprint and Functional Replacement for PCA9515B
  • Active-High Repeater-Enable Input
  • Open-Drain I2C I/O
  • 5.5-V Tolerant I2C and Enable Input Support Mixed-Mode Signal Operation
  • Accommodates Standard Mode and Fast Mode I2C Devices and Multiple Masters
  • High-Impedance I2C Pins When Powered-Off
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 5500 V Human-Body Model (A114-A)
    • 200 V Machine Model (A115-A)
    • 1000 V Charged-Device Model (C101)

All trademarks are the property of their respective owners.

open-in-new Find other I2C level shifters, buffers & hubs

Description

The TCA9517 is a bidirectional buffer with level shifting capabilities for I2C and SMBus systems. It provides bidirectional voltage-level translation (up-translation/down-translation) between low voltages (down to 0.9 V) and higher voltages (2.7 V to 5.5 V) in mixed-mode applications. This device enables I2C and SMBus systems to be extended without degradation of performance, even during level shifting.

The TCA9517 buffers both the serial data (SDA) and the serial clock (SCL) signals on the I2C bus, thus allowing two buses of up to 400-pF bus capacitance to be connected in an I2C application.

The TCA9517 has two types of drivers: A-side drivers and B-side drivers. All inputs and I/Os are over-voltage tolerant to 5.5 V, even when the device is unpowered (VCCB and/or VCCA = 0 V).

The type of buffer design on the B-side prevents it from being used in series with devices which use static voltage offset. This is because these devices do not recognize buffered low signals as a valid low and do not propagate it as a buffered low again.

The B-side drivers operate from 2.7 V to 5.5 V. The output low level for this internal buffer is approximately 0.5 V, but the input voltage must be 70 mV or more below the output low level when the output internally is driven low. The higher-voltage low signal is called a buffered low. When the B-side I/O is driven low internally, the low is not recognized as a low by the input. This feature prevents a lockup condition from occurring when the input low condition is released.

The A-side drivers operate from 0.9 V to 5.5 V and drive more current. They do not require the buffered low feature (or the static offset voltage). This means that a low signal on the B-side translates to a nearly 0 V low on the A-side, which accommodates smaller voltage swings of lower-voltage logic. The output pulldown on the A-side drives a hard low, and the input level is set at 0.3 × VCCA to accommodate the need for a lower low level in systems where the low-voltage-side supply voltage is as low as 0.9 V.

The A-side of two or more TCA9517 s can be connected together, allowing many topographies (See Figure 8 and Figure 9 ), with the A-side as the common bus. Also, the A-side can be connected directly to any other buffer with static- or dynamic-offset voltage. Multiple TCA9517 s can be connected in series, A-side to B-side, with no buildup in offset voltage and with only time-of-flight delays to consider. The TCA9517 cannot be connected B-side to B-side, because of the buffered low voltage from the B-side. The B-side cannot be connected to a device with rise time accelerators.

VCCA is only used to provide the 0.3 × VCCA reference to the A-side input comparators and for the power-good-detect circuit. The TCA9517 logic and all I/Os are powered by the VCCB pin.

As with the standard I2C system, pullup resistors are required to provide the logic-high levels on the buffered bus. The TCA9517 has standard open-drain configuration of the I2C bus. The size of these pullup resistors depends on the system, but each side of the repeater must have a pullup resistor. The device is designed to work with Standard mode and Fast mode I2C devices in addition to SMBus devices. Standard mode I2C devices only specify 3 mA in a generic I2C system, where Standard mode devices and multiple masters are possible. Under certain conditions, higher termination currents can be used.

open-in-new Find other I2C level shifters, buffers & hubs
Download
Similar products you might be interested in
open-in-new Compare products
Same functionality and pinout but is not an equivalent to the compared device:
TCA9803 ACTIVE Level-Translating I2C Bus Buffer/Repeater This pin-to-pin device has improved performance (better signal integrity, faster rise times, slew rate control) and reduces external components required

Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 8
Type Title Date
* Datasheet TCA9517 Level-Shifting I2C Bus Repeater datasheet (Rev. D) Jul. 28, 2017
Application notes Why, When, and How to use I2C Buffers May 23, 2018
Technical articles Quick fixes to common I2C headaches Apr. 24, 2017
Application notes Choosing the Correct I2C Device for New Designs Sep. 07, 2016
Selection guides I2C Infographic Flyer Dec. 03, 2015
Application notes Understanding the I2C Bus Jun. 30, 2015
Application notes Maximum Clock Frequency of I2C Bus Using Repeaters May 15, 2015
Application notes I2C Bus Pull-Up Resistor Calculation Feb. 13, 2015

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Design tools & simulation

SIMULATION MODELS Download
SCPM024.ZIP (46 KB) - IBIS Model
SIMULATION TOOLS Download
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
SIMULATION TOOLS Download
SPICE-based analog simulation program
TINA-TI TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
document-generic User guide
DESIGN TOOLS Download
I2C designer tool
I2C-DESIGNER — Use the I2C Designer tool to quickly resolve conflicts in addressing, voltage level and frequency in I2C based designs. Enter master and slave inputs to automatically generate an I2C tree or easily build a custom solution. This tool will help designers save time and comply with the I2C standard with (...)
Features
  • GUI-based web application
  • Exportable designs
  • JSON file uploader
  • Bill of materials generator

Reference designs

REFERENCE DESIGNS Download
±2% Accurate Humidity Sensing Reference Design Supporting Robust 2m Wire Communication
TIDA-00972 — The TIDA-00972 reference design provides a sensor module level solution for +/- 2% of accuracy and reliable Relative Humidity (RH) and +/- 0.2 °C accuracy temperature sensing. The sensor module utilizes TI’s digital humidity and temperature sensor HDC1080 together with integrated (...)
document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
Ultrasonic Distance Measurement using the TLV320AIC3268 miniDSP CODEC Reference Design
TIDA-00403 The TIDA-00403 reference design uses off-the-shelf EVMs for ultrasonic distance measurement solutions using algorithms within the TLV320AIC3268 miniDSP. In conjunction with TI’s PurePath Studio design suite, a robust and user configurable ultrasonic distance measurement system can be designed (...)
document-generic Schematic document-generic User guide

CAD/CAE symbols

Package Pins Download
SOIC (D) 8 View options
VSSOP (DGK) 8 View options

Ordering & quality

Recommended products may have parameters, evaluation modules or reference designs related to this TI product.

Support & training

TI E2E™ forums with technical support from TI engineers

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

Videos

Related videos