Packaging information
| Package | Pins SOT-23 (DBV) | 5 |
| Operating temperature range (°C) -40 to 125 |
| Package qty | Carrier 3,000 | LARGE T&R |
Features for the TPS769-Q1
- AEC-Q100 qualified for automotive applications:
- Temperature grade 1: −40°C to 125°C, TA
- Input voltage range:
- Legacy chip: 2.7V to 10V (13.5V absolute max)
- New chip: 2.5V to 16V (18V absolute max)
- Output voltage range
(adjustable):
- Legacy chip: 1.25V to 5.5V
- New chip: 1.2V to 5.5V
- Output voltage range (fixed):
- Legacy chip: 1.5V to 5V
- New chip: 1.2V to 5V
- High PSRR (new chip): 46dB at 1MHz
- Output accuracy:
- Legacy chip: 3% over load and temperature
- New chip: 1.2% over load and temperature
- Dropout voltage:
- Legacy chip: 71mV (typ) at 100mA
- New chip: 150mV (typ) at 100mA
- Integrated fault protection:
- Thermal shutdown
- Overcurrent protection
- Internal soft-start time (new chip): 750µs (typical)
- Output capacitor for stable
operation:
- Legacy chip: ≥ 4.7µF
- New chip: ≥ 2.2µF
- Package: 5-pin SOT-23, RθJA = 178.6°C/W (new chip)
Description for the TPS769-Q1
The TPS769-Q1 is a low-dropout (LDO) linear voltage regulator. This device supports an input voltage range from 2.5V to 16V (new chip) and up to 100mA of load current. For the new chip, the supported output range is from 1.2V to 5.0V (fixed version) or from 1.2V to 5.5V (adjustable version).
The wide input voltage range makes the device a good choice for operating from regulated rails (such as 10V or 12V). The voltage range is up to 16V for the new chip. This range allows the LDO to generate the bias voltage for a variety of applications. These applications include power microcontrollers (MCUs) and processors, as well as silicon carbide (SiC) gate drivers and microphones.
Wide bandwidth PSRR performance is greater than 70dB at 1kHz and 46dB at 1MHz (new chip). This performance helps attenuate the switching frequency of an upstream DC/DC converter and minimizes post regulator filtering. The new chip supports an internal soft-start circuit mechanism that reduces inrush current during start-up, thus allowing for smaller input capacitance.