Startseite Schnittstelle LVDS-, M-LVDS- und PECL-ICs

SN65LVDS9637

AKTIV

Zweifacher LVDS-Empfänger

Produktdetails

Function Receiver Protocols LVDS Number of transmitters 0 Number of receivers 2 Supply voltage (V) 3.3 Signaling rate (MBits) 150 Input signal LVDS Output signal LVTTL Rating Catalog Operating temperature range (°C) -40 to 85
Function Receiver Protocols LVDS Number of transmitters 0 Number of receivers 2 Supply voltage (V) 3.3 Signaling rate (MBits) 150 Input signal LVDS Output signal LVTTL Rating Catalog Operating temperature range (°C) -40 to 85
HVSSOP (DGN) 8 14.7 mm² 3 x 4.9 SOIC (D) 8 29.4 mm² 4.9 x 6 VSSOP (DGK) 8 14.7 mm² 3 x 4.9
  • Meet or Exceed the Requirements of ANSI
    TIA/EIA-644 Standard
  • Operate With a Single 3.3-V Supply
  • Designed for Signaling Rates of up to
    150 Mbps
  • Differential Input Thresholds ±100 mV Max
  • Typical Propagation Delay Time of 2.1 ns
  • Power Dissipation 60 mW Typical Per
    Receiver at Maximum Data Rate
  • Bus-Terminal ESD Protection Exceeds 8 kV
  • Low-Voltage TTL (LVTTL) Logic Output
    Levels
  • Pin Compatible With AM26LS32, MC3486,
    and µA9637
  • Open-Circuit Fail-Safe
  • Cold Sparing for Space and High-Reliability
    Applications Requiring Redundancy
  • Meet or Exceed the Requirements of ANSI
    TIA/EIA-644 Standard
  • Operate With a Single 3.3-V Supply
  • Designed for Signaling Rates of up to
    150 Mbps
  • Differential Input Thresholds ±100 mV Max
  • Typical Propagation Delay Time of 2.1 ns
  • Power Dissipation 60 mW Typical Per
    Receiver at Maximum Data Rate
  • Bus-Terminal ESD Protection Exceeds 8 kV
  • Low-Voltage TTL (LVTTL) Logic Output
    Levels
  • Pin Compatible With AM26LS32, MC3486,
    and µA9637
  • Open-Circuit Fail-Safe
  • Cold Sparing for Space and High-Reliability
    Applications Requiring Redundancy

The SN55LVDS32, SN65LVDS32, SN65LVDS3486, and SN65LVDS9637 devices are differential line receivers that implement the electrical characteristics of low-voltage differential signaling (LVDS). This signaling technique lowers the output voltage levels of 5-V differential standard levels (such as EIA/TIA-422B) to reduce the power, increase the switching speeds, and allow operation with a 3.3-V supply rail. Any of the differential receivers provides a valid logical output state with a ±100-mV differential input voltage within the input common-mode voltage range. The input common-mode voltage range allows 1 V of ground potential difference between two LVDS nodes.

The intended application of these devices and signaling technique is both point-to-point and multidrop (one driver and multiple receivers) data transmission over controlled impedance media of approximately 100 Ω. The transmission media may be printed-circuit board traces, backplanes, or cables. The ultimate rate and distance of data transfer depends on the attenuation characteristics of the media and the noise coupling to the environment.

The SN65LVDS32, SN65LVDS3486, and SN65LVDS9637 devices are characterized for operation from –40°C to 85°C. The SN55LVDS32 device is characterized for operation from –55°C to 125°C.

The SN55LVDS32, SN65LVDS32, SN65LVDS3486, and SN65LVDS9637 devices are differential line receivers that implement the electrical characteristics of low-voltage differential signaling (LVDS). This signaling technique lowers the output voltage levels of 5-V differential standard levels (such as EIA/TIA-422B) to reduce the power, increase the switching speeds, and allow operation with a 3.3-V supply rail. Any of the differential receivers provides a valid logical output state with a ±100-mV differential input voltage within the input common-mode voltage range. The input common-mode voltage range allows 1 V of ground potential difference between two LVDS nodes.

The intended application of these devices and signaling technique is both point-to-point and multidrop (one driver and multiple receivers) data transmission over controlled impedance media of approximately 100 Ω. The transmission media may be printed-circuit board traces, backplanes, or cables. The ultimate rate and distance of data transfer depends on the attenuation characteristics of the media and the noise coupling to the environment.

The SN65LVDS32, SN65LVDS3486, and SN65LVDS9637 devices are characterized for operation from –40°C to 85°C. The SN55LVDS32 device is characterized for operation from –55°C to 125°C.

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Technische Dokumentation

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Typ Titel Datum
* Data sheet SNx5LVDS32, SN65LVDS3486, SN65LVDS9637 High-Speed Differential Line Receivers datasheet (Rev. R) 06 Aug 2014
Application brief LVDS to Improve EMC in Motor Drives 27 Sep 2018
Application brief How Far, How Fast Can You Operate LVDS Drivers and Receivers? 03 Aug 2018
Application brief How to Terminate LVDS Connections with DC and AC Coupling 16 Mai 2018
Application note An Overview of LVDS Technology 05 Okt 1998

Design und Entwicklung

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Simulationsmodell

SN65LVDS9637 IBIS Model

SLLC018.ZIP (4 KB) - IBIS Model
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Benutzerhandbuch: PDF
Gehäuse Pins Herunterladen
HVSSOP (DGN) 8 Optionen anzeigen
SOIC (D) 8 Optionen anzeigen
VSSOP (DGK) 8 Optionen anzeigen

Bestellen & Qualität

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  • Materialinhalt
  • Qualifikationszusammenfassung
  • Kontinuierliches Zuverlässigkeitsmonitoring
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