홈 마이크로컨트롤러(MCU) 및 프로세서 마이크로프로세서 및 DSP 차량용 운전자 지원 SoC
홈
마이크로컨트롤러(MCU) 및 프로세서
마이크로프로세서 및 DSP
차량용 운전자 지원 SoC

AM620-Q1

활성

운전자 모니터링, 네트워킹 및 V2X 시스템을 위한 임베디드 안전을 갖춘 오토모티브 컴퓨팅 SoC

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AM620-Q1

활성
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제품 상세 정보

CPU 1 Arm Cortex-A53, 2 Arm Cortex-A53, 4 Arm Cortex-A53 Frequency (MHz) 1400 Coprocessors 1 Arm Cortex-M4F Protocols Ethernet, TSN Features Vision Analytics Operating system Linux Security Secure boot TI functional safety category Functional Safety-Compliant Rating Automotive Power supply solution TPS65219 Operating temperature range (°C) -40 to 125 Edge AI enabled No
CPU 1 Arm Cortex-A53, 2 Arm Cortex-A53, 4 Arm Cortex-A53 Frequency (MHz) 1400 Coprocessors 1 Arm Cortex-M4F Protocols Ethernet, TSN Features Vision Analytics Operating system Linux Security Secure boot TI functional safety category Functional Safety-Compliant Rating Automotive Power supply solution TPS65219 Operating temperature range (°C) -40 to 125 Edge AI enabled No
FCBGA (AMC) 441 295.84 mm² 17.2 x 17.2 FCCSP (ALW) 425 169 mm² 13 x 13

Processor Cores:

  • Up to Quad 64-bit Arm Cortex-A53 microprocessor subsystem at up to 1.4GHz
    • Quad-core Cortex-A53 cluster with 512KB L2 shared cache with SECDED ECC
    • Each A53 Core has 32KB L1 DCache with SECDED ECC and 32KB L1 ICache with Parity protection
  • Single-core Arm® Cortex®-M4F MCU at up to 400MHz
    • 256KB SRAM with SECDED ECC
  • Dedicated Device/Power Manager

Multimedia:

  • Display subsystem
    • Dual display support
    • 1920x1080 @ 60fps for each display
    • 1x 2048x1080 + 1x 1280x720
    • Up to 165MHz pixel clock support with Independent PLL for each display
    • OLDI (4 lanes LVDS - 2x) and DPI (24-bit RGB LVCMOS)
    • Support safety feature such as freeze frame detection and MISR data check
  • 3D Graphics Processing Unit
    • 1 pixel per clock or higher
    • Fillrate greater than 500Mpixels/sec
    • >500MTexels/s, >8GFLOPs
    • Supports at least 2 composition layers
    • Supports up to 2048x1080 @60fps
    • Supports ARGB32, RGB565 and YUV formats
    • 2D graphics capable
    • OpenGL ES 3.1, Vulkan 1.2
  • One Camera Serial interface (CSI-Rx) - 4 Lane with DPHY
    • MIPI CSI-2 v1.3 Compliant + MIPI D-PHY 1.2
    • Support for 1,2,3 or 4 data lane mode up to 1.5Gbps per lane
    • ECC verification/correction with CRC check + ECC on RAM
    • Virtual Channel support (up to 16)
    • Ability to write stream data directly to DDR via DMA

Memory Subsystem:

  • Up to 816KB of On-chip RAM
    • 64KB of On-chip RAM (OCSRAM) with SECDED ECC , Can be divided into smaller banks in increments of 32KB for as many as 2 separate memory banks
    • 256KB of On-chip RAM with SECDED ECC in SMS Subsystem
    • 176KB of On-chip RAM with SECDED ECC in SMS Subsystem for TI security firmware
    • 256KB of On-chip RAM with SECDED ECC in Cortex-M4F MCU subsystem
    • 64KB of On-chip RAM with SECDED ECC in Device/Power Manager Subsystem
  • DDR Subsystem (DDRSS)
    • Supports LPDDR4, DDR4 memory types
    • 16-Bit data bus with inline ECC
    • Supports speeds up to 1600MT/s
    • Max addressable range
      • 8GBytes with DDR4
      • 4GBytes with LPDDR4

Functional Safety:

  • Functional Safety-Compliant targeted [Automotive]
    • Developed for functional safety applications
    • Documentation will be available to aid ISO 26262 functional safety system design
    • Systematic capability up to ASIL D targeted
    • Hardware integrity up to ASIL B targeted
    • Safety-related certification
      • ISO 26262 by TUV SUD planned
  • AEC - Q100 qualified

Security:

  • Secure boot supported
    • Hardware-enforced Root-of-Trust (RoT)
    • Support to switch RoT via backup key
    • Support for takeover protection, IP protection, and anti-roll back protection
  • Trusted Execution Environment (TEE) supported
    • Arm TrustZone based TEE
    • Extensive firewall support for isolation
    • Secure watchdog/timer/IPC
    • Secure storage support
    • Replay Protected Memory Block (RPMB) support
  • Dedicated Security Controller with user programmable HSM core and dedicated security DMA & IPC subsystem for isolated processing
  • Cryptographic acceleration supported
    • Session-aware cryptographic engine with ability to auto-switch key-material based on incoming data stream
      • Supports cryptographic cores
    • AES – 128-/192-/256-Bit key sizes
    • SHA2 – 224-/256-/384-/512-Bit key sizes
    • DRBG with true random number generator
    • PKA (Public Key Accelerator) to Assist in RSA/ECC processing for secure boot
  • Debugging security
    • Secure software controlled debug access
    • Security aware debugging

PRU Subsystem:

  • Dual-core Programmable Real-Time Unit Subystem (PRUSS) running up to 333MHz
  • Intended for driving GPIO for cycle accurate protocols such as additional:
    • General Purpose Input/Output (GPIO)
    • UARTs
    • I2C
    • External ADC
  • 16KByte program memory per PRU with SECDED ECC
  • 8KB data memory per PRU with SECDED ECC
  • 32KB general purpose memory with SECDED ECC
  • CRC32/16 HW accelerator
  • Scratch PAD memory with 3 banks of 30 x 32-bit registers
  • 1 Industrial 64-bit timer with 9 capture and 16 compare events, along with slow and fast compensation
  • 1 interrupt controller (INTC), minimum of 64 input events supported

High-Speed Interfaces:

  • Integrated Ethernet switch supporting (total 2 external ports)
    • RMII(10/100) or RGMII (10/100/1000)
    • IEEE1588 (Annex D, Annex E, Annex F with 802.1AS PTP)
    • Clause 45 MDIO PHY management
    • Packet Classifier based on ALE engine with 512 classifiers
    • Priority based flow control
    • Time sensitive networking (TSN) support
    • Four CPU H/W interrupt Pacing
    • IP/UDP/TCP checksum offload in hardware
  • Two USB2.0 Ports
    • Port configurable as USB host, USB peripheral, or USB Dual-Role Device (DRD mode)
    • Integrated USB VBUS detection

General Connectivity:

  • 9x Universal Asynchronous Receiver-Transmitters (UART)
  • 5x Serial Peripheral Interface (SPI) controllers
  • 6x Inter-Integrated Circuit (I2C) ports
  • 3x Multichannel Audio Serial Ports (McASP)
    • Transmit and Receive Clocks up to 50MHz
    • Up to 4/6/16 Serial Data Pins across 3x McASP with Independent TX and RX Clocks
    • Supports Time Division Multiplexing (TDM), Inter-IC Sound (I2S), and Similar Formats
    • Supports Digital Audio Interface Transmission (SPDIF, IEC60958-1, and AES-3 Formats)
    • FIFO Buffers for Transmit and Receive (256 Bytes)
    • Support for audio reference output clock
  • 3x enhanced PWM modules (ePWM)
  • 3x enhanced Quadrature Encoder Pulse modules (eQEP)
  • 3x enhanced Capture modules (eCAP)
  • General-Purpose I/O (GPIO), All LVCMOS I/O can be configured as GPIO
  • 3x Controller Area Network (CAN) modules with CAN-FD support
    • Conforms w/ CAN Protocol 2.0 A, B and ISO 11898-1
    • Full CAN FD support (up to 64 data bytes)
    • Parity/ECC check for Message RAM
    • Speed up to 8Mbps

Media and Data Storage:

  • 3x Multi-Media Card/Secure Digital (MMC/SD/SDIO) interface
    • 1x 8-bit eMMC interface up to HS200 speed
    • 2x 4-bit SD/SDIO interface up to UHS-I
    • Compliant with eMMC 5.1, SD 3.0 and SDIO Version 3.0
  • 1× General-Purpose Memory Controller (GPMC) up to 133MHz
    • Flexible 8- and 16-Bit Asynchronous Memory Interface With up to four Chip (22-bit address) Selects (NAND, NOR, Muxed-NOR, and SRAM)
    • Uses BCH Code to Support 4-, 8-, or 16-Bit ECC
    • Uses Hamming Code to Support 1-Bit ECC
    • Error Locator Module (ELM)
      • Used With the GPMC to Locate Addresses of Data Errors From Syndrome Polynomials Generated Using a BCH Algorithm
      • Supports 4-, 8-, and 16-Bit Per 512-Byte Block Error Location Based on BCH Algorithms
  • OSPI/QSPI with DDR / SDR support
    • Support for Serial NAND and Serial NOR flash devices
    • 4GBytes memory address support
    • XIP mode with optional on-the-fly encryption

Power Management:

  • Low power modes supported by Device/Power Manager
    • Partial IO support for CAN/GPIO/UART wakeup
    • DeepSleep
    • MCU Only
    • Standby
    • Dynamic frequency scaling for Cortex-A53

Optimal Power Management Solution:

  • Recommended TPS65219 Power Management ICs (PMIC)
    • Companion PMIC specially designed to meet device power supply requirements
    • Flexible mapping and factory programmed configurations to support different use cases

Boot Options:

  • UART
  • I2C EEPROM
  • OSPI/QSPI Flash
  • GPMC NOR/NAND Flash
  • Serial NAND Flash
  • SD Card
  • eMMC
  • USB (host) boot from Mass Storage device
  • USB (device) boot from external host (DFU mode)
  • Ethernet

Technology / Package:

  • 16nm technology
  • 13mm x 13mm, 0.5mm pitch, 425-pin FCCSP BGA (ALW)
  • 17.2mm x 17.2mm, 0.8mm pitch, 441-pin FCBGA (AMC)

Processor Cores:

  • Up to Quad 64-bit Arm Cortex-A53 microprocessor subsystem at up to 1.4GHz
    • Quad-core Cortex-A53 cluster with 512KB L2 shared cache with SECDED ECC
    • Each A53 Core has 32KB L1 DCache with SECDED ECC and 32KB L1 ICache with Parity protection
  • Single-core Arm® Cortex®-M4F MCU at up to 400MHz
    • 256KB SRAM with SECDED ECC
  • Dedicated Device/Power Manager

Multimedia:

  • Display subsystem
    • Dual display support
    • 1920x1080 @ 60fps for each display
    • 1x 2048x1080 + 1x 1280x720
    • Up to 165MHz pixel clock support with Independent PLL for each display
    • OLDI (4 lanes LVDS - 2x) and DPI (24-bit RGB LVCMOS)
    • Support safety feature such as freeze frame detection and MISR data check
  • 3D Graphics Processing Unit
    • 1 pixel per clock or higher
    • Fillrate greater than 500Mpixels/sec
    • >500MTexels/s, >8GFLOPs
    • Supports at least 2 composition layers
    • Supports up to 2048x1080 @60fps
    • Supports ARGB32, RGB565 and YUV formats
    • 2D graphics capable
    • OpenGL ES 3.1, Vulkan 1.2
  • One Camera Serial interface (CSI-Rx) - 4 Lane with DPHY
    • MIPI CSI-2 v1.3 Compliant + MIPI D-PHY 1.2
    • Support for 1,2,3 or 4 data lane mode up to 1.5Gbps per lane
    • ECC verification/correction with CRC check + ECC on RAM
    • Virtual Channel support (up to 16)
    • Ability to write stream data directly to DDR via DMA

Memory Subsystem:

  • Up to 816KB of On-chip RAM
    • 64KB of On-chip RAM (OCSRAM) with SECDED ECC , Can be divided into smaller banks in increments of 32KB for as many as 2 separate memory banks
    • 256KB of On-chip RAM with SECDED ECC in SMS Subsystem
    • 176KB of On-chip RAM with SECDED ECC in SMS Subsystem for TI security firmware
    • 256KB of On-chip RAM with SECDED ECC in Cortex-M4F MCU subsystem
    • 64KB of On-chip RAM with SECDED ECC in Device/Power Manager Subsystem
  • DDR Subsystem (DDRSS)
    • Supports LPDDR4, DDR4 memory types
    • 16-Bit data bus with inline ECC
    • Supports speeds up to 1600MT/s
    • Max addressable range
      • 8GBytes with DDR4
      • 4GBytes with LPDDR4

Functional Safety:

  • Functional Safety-Compliant targeted [Automotive]
    • Developed for functional safety applications
    • Documentation will be available to aid ISO 26262 functional safety system design
    • Systematic capability up to ASIL D targeted
    • Hardware integrity up to ASIL B targeted
    • Safety-related certification
      • ISO 26262 by TUV SUD planned
  • AEC - Q100 qualified

Security:

  • Secure boot supported
    • Hardware-enforced Root-of-Trust (RoT)
    • Support to switch RoT via backup key
    • Support for takeover protection, IP protection, and anti-roll back protection
  • Trusted Execution Environment (TEE) supported
    • Arm TrustZone based TEE
    • Extensive firewall support for isolation
    • Secure watchdog/timer/IPC
    • Secure storage support
    • Replay Protected Memory Block (RPMB) support
  • Dedicated Security Controller with user programmable HSM core and dedicated security DMA & IPC subsystem for isolated processing
  • Cryptographic acceleration supported
    • Session-aware cryptographic engine with ability to auto-switch key-material based on incoming data stream
      • Supports cryptographic cores
    • AES – 128-/192-/256-Bit key sizes
    • SHA2 – 224-/256-/384-/512-Bit key sizes
    • DRBG with true random number generator
    • PKA (Public Key Accelerator) to Assist in RSA/ECC processing for secure boot
  • Debugging security
    • Secure software controlled debug access
    • Security aware debugging

PRU Subsystem:

  • Dual-core Programmable Real-Time Unit Subystem (PRUSS) running up to 333MHz
  • Intended for driving GPIO for cycle accurate protocols such as additional:
    • General Purpose Input/Output (GPIO)
    • UARTs
    • I2C
    • External ADC
  • 16KByte program memory per PRU with SECDED ECC
  • 8KB data memory per PRU with SECDED ECC
  • 32KB general purpose memory with SECDED ECC
  • CRC32/16 HW accelerator
  • Scratch PAD memory with 3 banks of 30 x 32-bit registers
  • 1 Industrial 64-bit timer with 9 capture and 16 compare events, along with slow and fast compensation
  • 1 interrupt controller (INTC), minimum of 64 input events supported

High-Speed Interfaces:

  • Integrated Ethernet switch supporting (total 2 external ports)
    • RMII(10/100) or RGMII (10/100/1000)
    • IEEE1588 (Annex D, Annex E, Annex F with 802.1AS PTP)
    • Clause 45 MDIO PHY management
    • Packet Classifier based on ALE engine with 512 classifiers
    • Priority based flow control
    • Time sensitive networking (TSN) support
    • Four CPU H/W interrupt Pacing
    • IP/UDP/TCP checksum offload in hardware
  • Two USB2.0 Ports
    • Port configurable as USB host, USB peripheral, or USB Dual-Role Device (DRD mode)
    • Integrated USB VBUS detection

General Connectivity:

  • 9x Universal Asynchronous Receiver-Transmitters (UART)
  • 5x Serial Peripheral Interface (SPI) controllers
  • 6x Inter-Integrated Circuit (I2C) ports
  • 3x Multichannel Audio Serial Ports (McASP)
    • Transmit and Receive Clocks up to 50MHz
    • Up to 4/6/16 Serial Data Pins across 3x McASP with Independent TX and RX Clocks
    • Supports Time Division Multiplexing (TDM), Inter-IC Sound (I2S), and Similar Formats
    • Supports Digital Audio Interface Transmission (SPDIF, IEC60958-1, and AES-3 Formats)
    • FIFO Buffers for Transmit and Receive (256 Bytes)
    • Support for audio reference output clock
  • 3x enhanced PWM modules (ePWM)
  • 3x enhanced Quadrature Encoder Pulse modules (eQEP)
  • 3x enhanced Capture modules (eCAP)
  • General-Purpose I/O (GPIO), All LVCMOS I/O can be configured as GPIO
  • 3x Controller Area Network (CAN) modules with CAN-FD support
    • Conforms w/ CAN Protocol 2.0 A, B and ISO 11898-1
    • Full CAN FD support (up to 64 data bytes)
    • Parity/ECC check for Message RAM
    • Speed up to 8Mbps

Media and Data Storage:

  • 3x Multi-Media Card/Secure Digital (MMC/SD/SDIO) interface
    • 1x 8-bit eMMC interface up to HS200 speed
    • 2x 4-bit SD/SDIO interface up to UHS-I
    • Compliant with eMMC 5.1, SD 3.0 and SDIO Version 3.0
  • 1× General-Purpose Memory Controller (GPMC) up to 133MHz
    • Flexible 8- and 16-Bit Asynchronous Memory Interface With up to four Chip (22-bit address) Selects (NAND, NOR, Muxed-NOR, and SRAM)
    • Uses BCH Code to Support 4-, 8-, or 16-Bit ECC
    • Uses Hamming Code to Support 1-Bit ECC
    • Error Locator Module (ELM)
      • Used With the GPMC to Locate Addresses of Data Errors From Syndrome Polynomials Generated Using a BCH Algorithm
      • Supports 4-, 8-, and 16-Bit Per 512-Byte Block Error Location Based on BCH Algorithms
  • OSPI/QSPI with DDR / SDR support
    • Support for Serial NAND and Serial NOR flash devices
    • 4GBytes memory address support
    • XIP mode with optional on-the-fly encryption

Power Management:

  • Low power modes supported by Device/Power Manager
    • Partial IO support for CAN/GPIO/UART wakeup
    • DeepSleep
    • MCU Only
    • Standby
    • Dynamic frequency scaling for Cortex-A53

Optimal Power Management Solution:

  • Recommended TPS65219 Power Management ICs (PMIC)
    • Companion PMIC specially designed to meet device power supply requirements
    • Flexible mapping and factory programmed configurations to support different use cases

Boot Options:

  • UART
  • I2C EEPROM
  • OSPI/QSPI Flash
  • GPMC NOR/NAND Flash
  • Serial NAND Flash
  • SD Card
  • eMMC
  • USB (host) boot from Mass Storage device
  • USB (device) boot from external host (DFU mode)
  • Ethernet

Technology / Package:

  • 16nm technology
  • 13mm x 13mm, 0.5mm pitch, 425-pin FCCSP BGA (ALW)
  • 17.2mm x 17.2mm, 0.8mm pitch, 441-pin FCBGA (AMC)

The low-cost AM62x Sitara™ MPU family of application processors are built for Linux® application development. With scalable Arm® Cortex®-A53 performance and embedded features, such as dual-display support and 3D graphics acceleration, along with an extensive set of peripherals, making the AM62x device well-suited for a broad range of industrial and automotive applications while offering intelligent features and optimized power architecture.

Functional safety requirements can be addressed using the integrated Cortex-M4F cores and dedicated peripherals, which can all be isolated from the rest of the AM62x processor.

The 3-port Gigabit Ethernet switch has one internal port and two external ports with Time-Sensitive Networking (TSN) capable. An additional PRU module on the device enables real-time I/O capability for customer’s own use cases. In addition, the extensive set of peripherals included in AM62x enable system-level connectivity, such as USB, MMC/SD, Camera interface, OSPI, CAN-FD and GPMC for parallel host interface to an external ASIC/FPGA. The AM62x device also supports secure boot for IP protection with the built-in Hardware Security Module (HSM) and employs advanced power management support for portable and power-sensitive applications.

Products in the AM62x processor family:

  • AM625 – Human-machine Interaction SoC with Arm® Cortex®-A53-based edge AI and full-HD dual-display
  • AM625-Q1 – Automotive Display SoC with embedded safety for digital clusters
  • AM623 – Internet of Things (IoT) and Gateway SoC with Arm® Cortex®-A53-based object and gesture recognition
  • AM620-Q1 – Automotive Compute SoC with embedded safety for driver monitoring, networking and V2X systems

The low-cost AM62x Sitara™ MPU family of application processors are built for Linux® application development. With scalable Arm® Cortex®-A53 performance and embedded features, such as dual-display support and 3D graphics acceleration, along with an extensive set of peripherals, making the AM62x device well-suited for a broad range of industrial and automotive applications while offering intelligent features and optimized power architecture.

Functional safety requirements can be addressed using the integrated Cortex-M4F cores and dedicated peripherals, which can all be isolated from the rest of the AM62x processor.

The 3-port Gigabit Ethernet switch has one internal port and two external ports with Time-Sensitive Networking (TSN) capable. An additional PRU module on the device enables real-time I/O capability for customer’s own use cases. In addition, the extensive set of peripherals included in AM62x enable system-level connectivity, such as USB, MMC/SD, Camera interface, OSPI, CAN-FD and GPMC for parallel host interface to an external ASIC/FPGA. The AM62x device also supports secure boot for IP protection with the built-in Hardware Security Module (HSM) and employs advanced power management support for portable and power-sensitive applications.

Products in the AM62x processor family:

  • AM625 – Human-machine Interaction SoC with Arm® Cortex®-A53-based edge AI and full-HD dual-display
  • AM625-Q1 – Automotive Display SoC with embedded safety for digital clusters
  • AM623 – Internet of Things (IoT) and Gateway SoC with Arm® Cortex®-A53-based object and gesture recognition
  • AM620-Q1 – Automotive Compute SoC with embedded safety for driver monitoring, networking and V2X systems
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추가 정보 요청

AM62-Q1에 대한 기능 안전 고급 문서. 지금 요청

AM62-Q1에 대한 기능 안전 고급 컨텐츠. 지금 요청

AM62-Q1에 대한 보안 고급 문서입니다. 지금 요청

기술 자료

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27개 모두 보기
상위 문서 유형 직함 형식 옵션 날짜
* Data sheet AM62x Sitara™ Processors datasheet (Rev. C) PDF | HTML 2025/10/31
* Errata AM62x Sitara Errata (Rev. G) PDF | HTML 2025/10/30
* User guide AM62x Sitara Processors Technical Reference Manual (Rev. C) PDF | HTML 2025/12/29
Application note Linux Audio on Sitara Socs PDF | HTML 2025/12/12
Functional safety information AM62x TÜV SÜD Functional Safety Certificate 2025/12/01
Application note AM62x Audio Design Guide PDF | HTML 2025/11/20
User guide Hardware Design Considerations for Custom Board Using AM625, AM623, AM620-Q1, AM625-Q1, AM625SIP Processor (Rev. E) PDF | HTML 2025/10/24
Application note Sitara Processor Power Distribution Networks: Implementation and Analysis (Rev. H) PDF | HTML 2025/10/17
User guide AM62x, AM62Ax, AM62D-Q1 and AM62Px Processor Family Schematic, Design Guidelines and Review Checklist (Rev. I) PDF | HTML 2025/09/17
User guide AM625, AM623, AM620-Q1, AM625-Q1, AM625SIP Processor Family Schematic, Design Guidelines and Review Checklist (Rev. B) PDF | HTML 2025/09/16
Application note AM62x, AM62Ax, AM62Px, AM62Lx Spread-Spectrum Clocking PDF | HTML 2025/09/08
Application note Custom Board Design and Simulation Guidelines for Processor High Speed Parallel Interfaces (Rev. A) PDF | HTML 2025/09/05
Application note Powering the AM62x with the TPS65219 PMIC (Rev. C) PDF | HTML 2025/08/18
Functional safety information AM6x, AM24x Software Diagnostics Library TÜV SÜD Functional Safety Certificate for 9.2.0 SDK (Rev. A) 2025/07/17
Application note AM62x, AM62Lx DDR Board Design and Layout Guidelines (Rev. C) PDF | HTML 2025/03/05
Application note MCAN Debug Guide PDF | HTML 2025/02/18
Application note Microcontroller Abstraction Layer on Jacinto™ and Sitara™ Embedded Processors PDF | HTML 2025/01/28
Application note Basic Ethernet Interface Debug With Linux PDF | HTML 2024/10/11
Application note Minimal Platform Development on AM62x Devices (Rev. A) PDF | HTML 2024/09/24
Functional safety information AM62, AM62A AUTOSAR MCAL Drivers Functional Safety Certificate 2024/08/16
Application note AM62x Power Consumption PDF | HTML 2024/02/16
Application brief Keyword Spotting Using AI at the Edge With Sitara Processors PDF | HTML 2023/09/28
White paper Time Sensitive Networking for Industrial Automation (Rev. C) 2023/07/31
Application note High-Speed Interface Layout Guidelines (Rev. J) PDF | HTML 2023/02/24
Application note AM62x (AMC) PCB Escape Routing PDF | HTML 2022/09/22
Application note AM62x Extended Power-On Hours PDF | HTML 2022/05/13
Application note AM62x Power Estimation Tool PDF | HTML 2022/04/08

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전원 공급 솔루션

AM620-Q1에 사용 가능한 전원 공급 솔루션을 찾아보세요. TI는 칩(SoC), 프로세서, 마이크로컨트롤러, 센서 또는 FPGA(Field Programmable Gate Array)의 TI와 비TI 시스템을 위한 전원 공급 솔루션을 제공합니다.

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SK-AM62-LP — 저전력 Sitara™ 프로세서용 AM62x 스타터 키트

SK-AM62-LP은 스타터 키트(SK) 평가 모듈(EVM)로, 수량이 한정되어 있습니다.

저전력 AM62x 스타터 키트(SK) 평가 모듈(EVM)은 AM62x SoC(시스템 온 칩)를 기반으로 구축된 독립형 테스트 및 개발 플랫폼입니다. AM62x 프로세서는 쿼드 코어 64비트 Arm®-Cortex®-A53 마이크로프로세서, 싱글 코어 Arm Cortex-R5F 및 Arm Cortex-M4F MCU로 구성되어 있습니다.

사용자는 SK-AM62-LP의 HDMI(고화질 멀티미디어 인터페이스)[DPI(dots per inch) 기준] (...)

사용 설명서: PDF | HTML
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디버그 프로브

TMDSEMU110-U — XDS110 JTAG 디버그 프로브

텍사스 인스트루먼트 XDS110은 TI 임베디드 프로세서를 위한 새로운 디버그 프로브(에뮬레이터)입니다. XDS110은 XDS100 제품군을 대체하면서 하나의 포드로 더 다양한 표준(IEEE1149.1, IEEE1149.7, SWD)을지원합니다. 또한 모든 XDS 디버그 프로브는 ETB(Embedded Trace Buffer)가 포함되어 있는 모든 Arm® 및 DSP 프로세서에서 코어(Core) 및 시스템 트레이스(System Trace)를 지원합니다.  핀을 통한 코어 추적의 경우 XDS560v2 PRO TRACE가 필요합니다.

(...)
사용 설명서: PDF
Download English Version: PDF
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디버그 프로브

TMDSEMU200-U — XDS200 USB 디버그 프로브

XDS200은 TI 임베디드 장치를 디버깅하는 데 사용되는 디버그 프로브(에뮬레이터)입니다. 대부분의 장치의 경우 더욱 저렴한 신형 XDS110(www.ti.com/tool/TMDSEMU110-U)을 사용하실 것을 권장합니다. XDS200은 단일 포드에서 다양한 표준(IEEE1149.1, IEEE1149.7, SWD)을 지원합니다. 모든 XDS 디버그 프로브는 ETB(임베디드 트레이스 버퍼)가 포함되어 있는 모든 Arm® 및 DSP 프로세서에서 코어 및 시스템 트레이스를 지원합니다.

XDS200은 TI 20핀 커넥터(TI 14핀, (...)

TI.com에서 구매할 수 없음
디버그 프로브

TMDSEMU560V2STM-UE — XDS560v2 시스템 추적 USB 및 이더넷 디버그 프로브

The XDS560v2 is the highest performance of the XDS family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7). Note that it does not support serial wire debug (SWD).

All XDS debug probes support Core and System Trace in all ARM and DSP processors that (...)

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디버그 프로브

LB-3P-TRACE32-ARM — Arm® 기반 마이크로컨트롤러 및 프로세서용 Lauterbach TRACE32® 디버그 및 트레이스 시스템

Lauterbach의 TRACE32® 툴은 개발자가 모든 종류의 Arm® 기반 마이크로컨트롤러 및 프로세서를 분석, 최적화 및 인증할 수 있도록 하는 첨단 하드웨어 및 소프트웨어 구성 요소 제품군입니다. 세계적으로 유명한 임베디드 시스템 및 SoC용 디버그 및 트레이스 솔루션은 초기 사전 실리콘 개발부터 현장의 제품 인증 및 문제 해결에 이르기까지 모든 개발 단계를 위한 완벽한 솔루션입니다. Lauterbach 툴의 직관적인 모듈형 설계는 엔지니어에게 현존하는 최고의 성능을 제공하고 요구 사항 변화에 따라 적응하고 성장하는 (...)

발송: Lauterbach GmbH
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디버그 프로브

TSK-3P-BLUEBOX — TASKING BlueBox hardware debugger

TASKING’s Debug, Trace, and Test tools offer comprehensive solutions for efficient debugging, tracing, and testing of TI's embedded systems. The scalable TASKING BlueBox debuggers allow users to easily flash, debug, and test across TI's portfolio. Development on TI hardware is made even easier with (...)

발송: TASKING Germany GmbH
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소프트웨어 개발 키트(SDK)

MCU-PLUS-SDK-AM62X — MCU+ SDK for AM62x – RTOS, No-RTOS

The AM62 processor Linux® software development kits (SDKs) are unified software platforms for embedded processors providing easy setup and fast out-of-box access to benchmarks and demonstrations.

All releases of this SDK are consistent across TI's broad portfolio for which they are provided, (...)

지원되는 제품 및 하드웨어

지원되는 제품 및 하드웨어
찾아보기 다운로드 옵션
소프트웨어 개발 키트(SDK)

PROCESSOR-SDK-ANDROID-AM62X — Processor SDK Android for AM62x

The AM62 processor Linux® software development kits (SDKs) are unified software platforms for embedded processors providing easy setup and fast out-of-box access to benchmarks and demonstrations.

All releases of this SDK are consistent across TI's broad portfolio for which they are provided, (...)

지원되는 제품 및 하드웨어

지원되는 제품 및 하드웨어
다운로드 옵션
소프트웨어 개발 키트(SDK)

PROCESSOR-SDK-LINUX-AM62X — Processor SDK Linux for AM62x

The AM62 processor Linux® software development kits (SDKs) are unified software platforms for embedded processors providing easy setup and fast out-of-box access to benchmarks and demonstrations.

All releases of this SDK are consistent across TI's broad portfolio for which they are provided, (...)

지원되는 제품 및 하드웨어

지원되는 제품 및 하드웨어
다운로드 옵션
소프트웨어 개발 키트(SDK)

PROCESSOR-SDK-LINUX-RT-AM62X — Processor SDK RT-Linux for AM62x

The AM62 processor Linux® software development kits (SDKs) are unified software platforms for embedded processors providing easy setup and fast out-of-box access to benchmarks and demonstrations.

All releases of this SDK are consistent across TI's broad portfolio for which they are provided, (...)

지원되는 제품 및 하드웨어

지원되는 제품 및 하드웨어
다운로드 옵션
애플리케이션 소프트웨어 및 프레임워크

AM62Q-17X17-RESTRICTED-DOCS-SAFETY — AM62x-Q1 functional safety documents

AM62x-Q1 Safety Manual and FMEDA
지원되는 제품 및 하드웨어

지원되는 제품 및 하드웨어
요청
애플리케이션 소프트웨어 및 프레임워크

AM62X-RESTRICTED-DOCS-SAFETY — AM62X safety content

AM62X safety content
지원되는 제품 및 하드웨어

지원되는 제품 및 하드웨어
요청
애플리케이션 소프트웨어 및 프레임워크

EB-3P-TRESOS — Elektrobit EB tresos 클래식 AUTOSAR 소프트웨어

기본 소프트웨어 분야에서 수십 년의 경험을 보유한 Elektrobit의 EB tresos 제품 라인과 맞춤형 클래식 AUTOSAR 솔루션은 첨단 소프트웨어를 제공하는 각 자동차 제조업체의 특정 요구 사항을 해결하는 데 도움이 됩니다. 각 프로젝트에서 Elektrobit는 OSEK-/VDX 호환 기본 소프트웨어부터 클래식 AUTOSAR 기반 멀티 코어 및 기능 안전 시스템까지 차량용 AUTOSAR 요구 사항을 충족하는 적절한 솔루션을 제공합니다.
발송: Elektrobit
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펌웨어

DDR-MARGIN-FW — Firmware and scripts to measure system DDR margin

The DDR margin firmware and supporting scripts allow visualization and measurement of system margin in the DDR interface on board. These tools enable probe-less measurement of critical data signals to understand the integrity and robustness of the interface.
지원되는 제품 및 하드웨어

지원되는 제품 및 하드웨어
다운로드 옵션
평가 모듈(EVM)용 GUI

ALTIA-3P-GUI — AM62x Sitara™ 프로세서용 Altia® GUI 개발 소프트웨어

Altia는 생산 임베디드 디스플레이를 위한 그래픽 사용자 인터페이스(GUI) 개발 소프트웨어 및 서비스를 전문으로 합니다. 전 세계 1억 대 이상의 장치에 설계된 Altia는 자동차, 의료, 소비자 가전 및 산업용 장치 업계의 회사들이 1등급 GUI를 생산에 활용하기 위해 사용하고 있습니다. Altia 제품 및 서비스는 다양한 TI Sitara™ 및 Jacinto™ 기반 프로세서를 지원합니다.

Altia 툴 체인에는 고급 3D 기능, 글로벌 언어 지원 등을 갖춘 효율적이고 사용하기 쉬운 통합 워크플로가 포함되어 있습니다. (...)

발송: Altia, Inc.
파트너 사이트 방문
시작하기

TI-DEVELOPER-ZONE — Start embedded development on your desktop or in the cloud

From evaluation to deployment the TI Developer Zone provides a comprehensive range of software, tools and training to ensure that you have everything you need for each stage of the development process.
지원되는 제품 및 하드웨어

지원되는 제품 및 하드웨어
시작하기
IDE, 구성, 컴파일러 또는 디버거

CCSTUDIO — Code Composer Studio integrated development environment (IDE)

Code Composer Studio is an integrated development environment (IDE) for TI's microcontrollers and processors. It is comprised of a rich suite of tools used to build, debug, analyze and optimize embedded applications. Code Composer Studio is available across Windows®, Linux® and macOS® platforms.

(...)

지원되는 제품 및 하드웨어

지원되는 제품 및 하드웨어
시작 다운로드 옵션
IDE, 구성, 컴파일러 또는 디버거

CLOCKTREE-AM62X — Clock tree configuration for AM62x


The Clock Tree Tool (CTT) for ARM Processors & Digital Signal Processors is an interactive configuration software tool that provides information about device clock tree architecture. This tool allows visualization of the device clock tree. It can also be used to determine the exact register (...)

지원되는 제품 및 하드웨어

지원되는 제품 및 하드웨어
시작
IDE, 구성, 컴파일러 또는 디버거

DDR-CONFIG-AM62 — DDR Configuration Tool

This SysConfig based tool simplifies the process of configuring the DDR Subsystem Controller and PHY to interface to SDRAM devices. Based on the memory device, board design, and topology the tool outputs files to initialize and train the selected memory.
지원되는 제품 및 하드웨어

지원되는 제품 및 하드웨어
시작 다운로드 옵션
IDE, 구성, 컴파일러 또는 디버거

K3-RESOURCE-CONFIGURATION — Resource partitioning tool for multi core SOCs

Also known as the k3-respart-tool, the Resource Configuration tool allows for configuration of various system level parameters and generate the necessary data to be fed into software components
지원되는 제품 및 하드웨어

지원되는 제품 및 하드웨어
시작
IDE, 구성, 컴파일러 또는 디버거

SYSCONFIG — Standalone desktop version of SysConfig

SysConfig is a configuration tool designed to simplify hardware and software configuration challenges to accelerate software development.

SysConfig is available as part of the Code Composer Studio™ integrated development environment as well as a standalone application. Additionally SysConfig (...)

지원되는 제품 및 하드웨어

지원되는 제품 및 하드웨어
시작 다운로드 옵션
온라인 교육

AM62-ACADEMY — AM62x Academy

AM62x Academy is designed to simplify and accelerate custom AM62x development.
지원되는 제품 및 하드웨어

지원되는 제품 및 하드웨어
찾아보기
운영 체제(OS)

GHS-3P-INTEGRITY-RTOS — Green Hills INTEGRITY RTOS

The flagship of Green Hills Software operating systems—the INTEGRITY RTOS—is built around a partitioning architecture to provide embedded systems with total reliability, absolute security, and maximum real-time performance. With its leadership pedigree underscored by certifications in a (...)
발송: Green Hills Software
파트너 사이트 방문
운영 체제(OS)

GHS-3P-UVELOSITY — Green Hills Software u-velOSity Safety RTOS

The µ-velOSity™ Safety RTOS is the smallest of Green Hills Software's real-time operating systems and was designed especially for microcontrollers. It supports a wide range of TI processor families using the Arm® Cortex-M or Cortex-R cores as a main CPU or as a co-processors (...)
발송: Green Hills Software
파트너 사이트 방문
운영 체제(OS)

WHIS-3P-SAFERTOS — WITTENSTEIN SAFERTOS 사전 인증 안전 RTOS

SAFERTOS®는 임베디드 프로세서를 위해 설계된 고유한 실시간 운영 체제입니다. TÜV SÜD의 IEC 61508 SIL3 및 ISO 26262 ASILD 표준에 따라 사전 인증을 받았습니다. SAFERTOS®는 WHIS 전문가 팀에서 안전을 위해 특별히 제작되었으며, 전 세계적으로 안전이 중요한 응용 분야에 사용됩니다. WHIS와 텍사스 인스트루먼트는 10년 넘게 협력해 왔습니다. 이 기간 동안, WHIS는 SAFERTOS®를 광범위한 TI 프로세서로 이식하여 널리 사용되는 모든 코어를 지원하며 요청 시 추가 아키텍처를 (...)
발송: WITTENSTEIN High Integrity Systems
파트너 사이트 방문
지원 소프트웨어

MCW-3P-FACEREC — 안면 인식, 신분 인증 및 인간 행동 분석을 위한 MulticoreWare 소프트웨어

MulticoreWare is a software engineering product and services company that combines its expertise in artificial intelligence and embedded systems to create Linux-based solutions to solve real world challenges in imaging, building automation, retail, authentication, smart city and a variety of (...)
발송: Multicoreware Inc.
파트너 사이트 방문
지원 소프트웨어

VCTR-3P-MICROSAR — 마이크로컨트롤러 및 고성능 컴퓨터(HPC)용 벡터 MICROSAR AUTOSAR 소프트웨어

MICROSAR 및 DaVinci 제품군은 정교한 임베디드 소프트웨어 및 마이크로 컨트롤러 및 HPC를 위한 강력한 개발 툴로 ECU 개발을 간소화합니다. 고급 인프라 소프트웨어를 사용하면 ECU를 위한 최적의 기반을 만들고 관련 툴로 수반되는 모든 개발 작업을 간소화할 수 있습니다. MICROSAR 내장 소프트웨어는 AUTOSAR 클래식 및 적응형과 같은 관련 표준에 따라 개발되었습니다. 이 소프트웨어는 ISO 26262까지 ASIL D에 따른 안전 관련 애플리케이션에도 적합합니다. 또한, 지능형 사이버 보안 기능은 무단 액세스 (...)
발송: Vector Informatik GmbH
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시뮬레이션 모델

AM620-Q1 IBIS model

SPRM886.ZIP (1969 KB) - IBIS Model
다운로드
시뮬레이션 모델

AM62x AMC BSDL Model

SPRM807.ZIP (10 KB) - BSDL Model
다운로드
시뮬레이션 모델

AM62x AMC IBIS Model

SPRM806.ZIP (1970 KB) - IBIS Model
다운로드
시뮬레이션 모델

AM62x AMC Thermal Model

SPRM809.ZIP (1 KB) - Thermal Model
다운로드
계산 툴

AM62X-PET-CALC — AM62x Power Estimation Tool

The AM62x power-estimation tool (PET) spreadsheet allows the user to calculate power consumption estimates based on measured and simulated data. Estimates are provided as is and are not ensured within a specified precision. Power consumption depends on electrical parameters, silicon process (...)

지원되는 제품 및 하드웨어

지원되는 제품 및 하드웨어
다운로드
패키지 핀 CAD 기호, 풋프린트 및 3D 모델
FCBGA (AMC) 441 Ultra Librarian
FCCSP (ALW) 425 Ultra Librarian
TI의 평가 항목에 대한 표준 약관이 적용됩니다.

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

권장 제품에는 본 TI 제품과 관련된 매개 변수, 평가 모듈 또는 레퍼런스 디자인이 있을 수 있습니다.

지원 및 교육

TI 엔지니어의 기술 지원을 받을 수 있는 TI E2E™ 포럼

포럼 주제 모두 보기(영문)

콘텐츠는 TI 및 커뮤니티 기고자에 의해 "있는 그대로" 제공되며 TI의 사양으로 간주되지 않습니다. 사용 약관을 참조하십시오.

품질, 패키징, TI에서 주문하는 데 대한 질문이 있다면 TI 지원을 방문하세요. ​​​​​​​​​​​​​​

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