GD65232

現行

具有 +/-7.5V 輸出和 +/-1.5-kV ESD 保護的 5-V 多通道 120kbps RS-232 線路驅動器/接收器

產品詳細資料

Drivers per package 3 Receivers per package 5 Logic voltage (min) (V) 5 Data rate (max) (Mbps) 0.12 Main supply voltage (nom) (V) 5 ESD HBM (kV) 1.5 Rating Catalog Operating temperature range (°C) -40 to 85 Vout (typ) (V) 7.5
Drivers per package 3 Receivers per package 5 Logic voltage (min) (V) 5 Data rate (max) (Mbps) 0.12 Main supply voltage (nom) (V) 5 ESD HBM (kV) 1.5 Rating Catalog Operating temperature range (°C) -40 to 85 Vout (typ) (V) 7.5
SOIC (DW) 20 131.84 mm² 12.8 x 10.3 TSSOP (PW) 20 41.6 mm² 6.5 x 6.4
  • Single chip with easy interface between UART and serial-port connector of IBM PC/AT and compatibles
  • Meet or exceed the requirements of TIA/EIA-232-F and ITU v.28 standards
  • Designed to support data rates up to 120kbits
  • Pinout compatible with SN75C185 and SN75185
  • ESD performance tested per JESD 22: HBM; 1500V, CDM: 500V, MM; 200V
  • Single chip with easy interface between UART and serial-port connector of IBM PC/AT and compatibles
  • Meet or exceed the requirements of TIA/EIA-232-F and ITU v.28 standards
  • Designed to support data rates up to 120kbits
  • Pinout compatible with SN75C185 and SN75185
  • ESD performance tested per JESD 22: HBM; 1500V, CDM: 500V, MM; 200V

The GD65232 and GD75232 combine three drivers and five receivers from the Texas Instruments trade-standard SN75188 and SN75189 bipolar quadruple drivers and receivers, respectively. The pinout matches the flow-through design of the SN75C185 to decrease the part count, reduce the board space required, and allow easy interconnection of the UART and serial-port connector of an IBM™ PC/AT and compatibles. The bipolar circuits and processing of the GD65232 and GD75232 provide a rugged, low-cost solution for this function at the expense of quiescent power and external passive components relative to the SN75C185.

The GD65232 and GD75232 comply with the requirements of the TIA/EIA-232-F and ITU (formerly CCITT) V.28 standards. These standards are for data interchange between a host computer and a peripheral at signaling rates up to 20kbits. The switching speeds of these devices are fast enough to support rates up to 120kbits with lower capacitive loads (shorter cables). Interoperability at the higher signaling rates cannot be expected unless the designer has design control of the cable and the interface circuits at both ends. For interoperability at signaling rates up to 120kbits, use of TIA/EIA-423-B (ITU V.10) and TIA/EIA-422-B (ITU V.11) standards is recommended.

The GD65232 and GD75232 combine three drivers and five receivers from the Texas Instruments trade-standard SN75188 and SN75189 bipolar quadruple drivers and receivers, respectively. The pinout matches the flow-through design of the SN75C185 to decrease the part count, reduce the board space required, and allow easy interconnection of the UART and serial-port connector of an IBM™ PC/AT and compatibles. The bipolar circuits and processing of the GD65232 and GD75232 provide a rugged, low-cost solution for this function at the expense of quiescent power and external passive components relative to the SN75C185.

The GD65232 and GD75232 comply with the requirements of the TIA/EIA-232-F and ITU (formerly CCITT) V.28 standards. These standards are for data interchange between a host computer and a peripheral at signaling rates up to 20kbits. The switching speeds of these devices are fast enough to support rates up to 120kbits with lower capacitive loads (shorter cables). Interoperability at the higher signaling rates cannot be expected unless the designer has design control of the cable and the interface circuits at both ends. For interoperability at signaling rates up to 120kbits, use of TIA/EIA-423-B (ITU V.10) and TIA/EIA-422-B (ITU V.11) standards is recommended.

下載 觀看有字幕稿的影片 影片

技術文件

star =TI 所選的此產品重要文件
找不到結果。請清除您的搜尋條件,然後再試一次。
檢視所有 1
類型 標題 日期
* Data sheet GD65232, GD75232 Multiple RS-232 Drivers and Receivers datasheet (Rev. L) PDF | HTML 2024年 8月 9日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
模擬工具

TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
SOIC (DW) 20 Ultra Librarian
TSSOP (PW) 20 Ultra Librarian

訂購與品質

內含資訊:
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

內容係由 TI 和社群貢獻者依「現狀」提供,且不構成 TI 規範。檢視使用條款

若有關於品質、封裝或訂購 TI 產品的問題,請參閱 TI 支援。​​​​​​​​​​​​​​

影片