HD3SS212
- Compatible with DisplayPort 1.2 electrical standard
- 2:1 switching supporting data rates up to 5.4Gbps
- Supports HPD switching
- Wide -3dB differential BW of over 5.4 GHz
- Excellent dynamic characteristics (at 2.7GHz)
- Crosstalk = –50dB
- Isolation = –22dB
- Insertion loss = –1.4dB
- Return loss = –11 dB
- Max bit-bit skew = 4 ps
- VDD operating range 3.3 V ±10%
- Small 5 mm x 5 mm x 1 mm, 48-ball nFBGA package
- Output enable (oe) pin disables switch to save power
- Power consumption
- HD3SS212 <10mW (standby <30µW when OE = L)
The HD3SS212 is a high-speed passive switch capable of switching two full DisplayPort 4 lane ports from one of two sources to one target location in an application. For DisplayPort applications that HD3SS212 also supports switching of the Auxiliary (AUX) and Hot Plug Detect (HPD) signals. HPD path is a buffer which requires a 125kΩ pull-down resistor on the HPDC line.
A typical application would be a mother board that includes two GPUs that need to drive one DisplayPort sink. The GPU is selected by the Dx_SEL pin. The HD3SS212 is offered in a 48-ball bfBGA package and specified to operate from a single supply voltage of 3.3V over full industrial temperature range of –40°C to 105°C.
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | 5.4Gbps DisplayPort 1.2 2-to-1 Differential Switch, HD3SS212 datasheet (Rev. D) | 2020年 12月 6日 | |
* | User guide | HSSC MicroStar BGA Discontinued and Redesigned | 2022年 5月 8日 | |
Application note | Passive Mux Selection Based On Bandwidth (Rev. A) | PDF | HTML | 2024年 7月 31日 | |
Application note | High-Speed Layout Guidelines for Signal Conditioners and USB Hubs | 2018年 6月 14日 |
設計與開發
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封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
NFBGA (ZXH) | 48 | Ultra Librarian |
訂購與品質
- RoHS
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- 材料內容
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