LM2512A

現行

具可選抖動和查找表的行動像素鏈路 (MPL-1) 24 位元 RGB 顯示介面串聯器

產品詳細資料

Protocols Catalog Rating Catalog Operating temperature range (°C) -30 to 85
Protocols Catalog Rating Catalog Operating temperature range (°C) -30 to 85
NFBGA (NZK) 49 16 mm² 4 x 4 X2QFN (NJM) 40 36 mm² 6 x 6
  • 24-bit RGB Interface Support up to 640 x 480 VGA Format
  • Optional 24 to 18-bit Dithering
  • Optional Look Up Table for Independent Color Correction
  • MPL-1 Physical Layer
  • SPI Interface for Look Up Table Control and Loading
  • Low Power Consumption & Powerdown State
  • Level Translation Between Host and Display
  • Optional Auto Power Down on STOP PCLK
  • Frame Sequence Bits Auto Resync upon Data or Clock Error
  • 1.6V to 2.0V Core / Analog Supply Voltage
  • 1.6V to 3.0V I/O Supply Voltage Range

System Benefits

  • Dithered Data Reduction
  • Independent RGB Color Correction
  • 24-bit Color Input
  • Small Interface, Low Power and Low EMI
  • Intrinsic Level Translation

All trademarks are the property of their respective owners.

  • 24-bit RGB Interface Support up to 640 x 480 VGA Format
  • Optional 24 to 18-bit Dithering
  • Optional Look Up Table for Independent Color Correction
  • MPL-1 Physical Layer
  • SPI Interface for Look Up Table Control and Loading
  • Low Power Consumption & Powerdown State
  • Level Translation Between Host and Display
  • Optional Auto Power Down on STOP PCLK
  • Frame Sequence Bits Auto Resync upon Data or Clock Error
  • 1.6V to 2.0V Core / Analog Supply Voltage
  • 1.6V to 3.0V I/O Supply Voltage Range

System Benefits

  • Dithered Data Reduction
  • Independent RGB Color Correction
  • 24-bit Color Input
  • Small Interface, Low Power and Low EMI
  • Intrinsic Level Translation

All trademarks are the property of their respective owners.

The LM2512A is a MPL Serializer (SER) that performs a 24-bit to 18-bit Dither operation and serialization of the video signals to Mobile Pixel link (MPL) levels on only 3 or 4 active signals. An optional Look Up Table (Three X 256 X 8 bit RAM) is also provided for independent color correction. 18-bit Bufferless or partial buffer displays from QVGA (320 x 240) up to VGA (640 x 480) pixels can utilize a 24-bit video source.

The interconnect is reduced from 28 signals to only 3 or 4 active signals with the LM2512A and companion deserializer easing flex interconnect design, size constraints and cost.

The LM2512A SER resides by the application, graphics or baseband processor and translates the wide parallel video bus from LVCMOS levels to serial Mobile Pixel Link levels for transmission over a flex cable (or coax) and PCB traces to the DES located near or in the display module.

When in Power_Down, the SER is put to sleep and draws less than 10μA. The link can also be powered down by stopping the PCLK (DES dependant) or by the PD* input pins.

The LM2512A provides enhanced AC performance over the LM2512. It implements the physical layer of the MPL-1 and uses a single-ended current-mode transmission.

The LM2512A is a MPL Serializer (SER) that performs a 24-bit to 18-bit Dither operation and serialization of the video signals to Mobile Pixel link (MPL) levels on only 3 or 4 active signals. An optional Look Up Table (Three X 256 X 8 bit RAM) is also provided for independent color correction. 18-bit Bufferless or partial buffer displays from QVGA (320 x 240) up to VGA (640 x 480) pixels can utilize a 24-bit video source.

The interconnect is reduced from 28 signals to only 3 or 4 active signals with the LM2512A and companion deserializer easing flex interconnect design, size constraints and cost.

The LM2512A SER resides by the application, graphics or baseband processor and translates the wide parallel video bus from LVCMOS levels to serial Mobile Pixel Link levels for transmission over a flex cable (or coax) and PCB traces to the DES located near or in the display module.

When in Power_Down, the SER is put to sleep and draws less than 10μA. The link can also be powered down by stopping the PCLK (DES dependant) or by the PD* input pins.

The LM2512A provides enhanced AC performance over the LM2512. It implements the physical layer of the MPL-1 and uses a single-ended current-mode transmission.

下載 觀看有字幕稿的影片 影片

技術文件

star =TI 所選的此產品重要文件
找不到結果。請清除您的搜尋條件,然後再試一次。
檢視所有 1
類型 標題 日期
* Data sheet MPL-1 24-Bit RGB Display I/F Serializer w/ Optional Dithering & Look Up Table datasheet (Rev. B) 2013年 5月 2日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI 是有助於評估類比電路功能的設計和模擬環境。這款全功能設計和模擬套件使用 Cadence® 的類比分析引擎。PSpice for TI 包括業界最大的模型庫之一,涵蓋我們的類比和電源產品組合,以及特定類比行為模型,且使用無需支付費用。

PSpice for TI 設計和模擬環境可讓您使用其內建函式庫來模擬複雜的混合訊號設計。在進行佈局和製造之前,建立完整的終端設備設計和解決方案原型,進而縮短上市時間並降低開發成本。 

在 PSpice for TI 設計與模擬工具中,您可以搜尋 TI (...)
模擬工具

TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
NFBGA (NZK) 49 Ultra Librarian
X2QFN (NJM) 40 Ultra Librarian

訂購與品質

內含資訊:
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

內容係由 TI 和社群貢獻者依「現狀」提供,且不構成 TI 規範。檢視使用條款

若有關於品質、封裝或訂購 TI 產品的問題,請參閱 TI 支援。​​​​​​​​​​​​​​

影片