SN65EL11
- 1:2 PECL/ECL Fanout Buffer
- Operating Range
- PECL: VCC = 4.2 V to 5.7 V With VEE = 0 V
- NECL: VCC = 0 V With VEE = -4.2 V to -5.7 V
- 5-ps Skew Between Outputs
- Support for Clock Frequencies >2.5 GHz
- 265-ps Typical Propagation Delay
- Deterministic Output Value for Open Input Conditions
- Drop-In Compatible With MC10EL11, MC100EL11
- Built-In Input Pulldown Resistors
- Built-In Temperature Compensation
- APPLICATIONS
- Data and Clock Transmission Over Backplane
- Signaling Level Conversion
The SN65EL11 is a differential 1:2 PECL/ECL fanout buffer. The device includes circuitry to maintain a known logic level when inputs are in an open condition. The SN65EL11 is housed in an industry-standard SOIC-8 package and is also available in a TSSOP-8 package.
技術文件
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| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | 5-V PECL/ECL 1:2 Fanout Buffer datasheet | 2008/11/26 | |||
| 應用說明 | AC Coupling Between Differential LVPECL, LVDS, HSTL and CML (Rev. C) | 2007/10/17 |
設計與開發
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| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| VSSOP (DGK) | 8 | Ultra Librarian |
| SOIC (D) | 8 | Ultra Librarian |