SN65LVDS387
- Four (’391), Eight (’389), or Sixteen (’387) Line
Drivers Meet or Exceed the Requirements of ANSI
EIA/TIA-644 Standard - Designed for Signaling Rates Up to 630 Mbps
With Very Low Radiation (EMI) - Low-Voltage Differential Signaling With Typical
Output Voltage of 350 mV and a 100-Ω Load - Propagation Delay Times Less Than 2.9 ns
- Output Skew Is Less Than 150 ps
- Part-to-Part Skew Is Less Than 1.5 ns
- 35-mW Total Power Dissipation in Each Driver
Operating at 200 MHz - Driver Is High-Impedance When Disabled or With
VCC < 1.5 V - SN65’ Version Bus-Pin ESD Protection Exceeds
15 kV - Packaged in Thin Shrink Small-Outline Package
With 20-mil Pin Pitch - Low-Voltage TTL (LVTTL) Logic Inputs Are 5-V
Tolerant
This family of 4, 8, and 16 differential line drivers implements the electrical characteristics of low-voltage differential signaling (LVDS). This signaling technique lowers the output voltage levels of 5-V differential standard levels (such as EIA/TIA-422B) to reduce the power, increase the switching speeds, and allow operation with a 3.3-V supply rail. Any of the 16 current-mode drivers will deliver a minimum differential output voltage magnitude of 247 mV into a 100-Ω load when enabled.
When disabled, the driver outputs are high-impedance. Each driver input (A) and enable (EN) have an internal pulldown that will drive the input to a low level when open-circuited.
The SN65LVDS387, SN65LVDS389, and SN65LVDS391 devices are characterized for operation from –40°C to 85°C. The SN75LVDS387, SN75LVDS389, and SN75LVDS391 devices are characterized for operation from 0°C to 70°C.
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技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | SNx5LVDS3xx High-Speed Differential Line Drivers datasheet (Rev. G) | PDF | HTML | 2016/1/14 | ||
| Application brief | How to Support 1.8-V Signals Using a 3.3-V LVDS Driver/Receiver + Level-Shifter | 2018/12/28 | ||||
| Application brief | LVDS to Improve EMC in Motor Drives | 2018/9/27 | ||||
| Application brief | How Far, How Fast Can You Operate LVDS Drivers and Receivers? | 2018/8/3 | ||||
| Application brief | How to Terminate LVDS Connections with DC and AC Coupling | 2018/5/16 | ||||
| 應用說明 | Using Signaling Rate and Transfer Rate (Rev. A) | 2005/2/7 | ||||
| 使用指南 | 16-Channel LVDS Driver/Receiver Evaluation Module | 2000/6/27 | ||||
| 應用說明 | An Overview of LVDS Technology | 1998/10/5 |
設計與開發
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SN65LVDS387EVM — 16 通道 LVDS 驅動器評估模組
We have designed easy-to-use evaluation modules (EVM) for our 16-channel low-voltage differential signaling (LVDS) driver and receivers. Flexibility has been designed into these EVMs so they can be set up in a point-to-point topology (1 driver to 1 receiver) or a multidrop topology (1 driver (...)
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| TSSOP (DGG) | 64 | Ultra Librarian |
訂購與品質
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。