SN65MLVD048

現行

4 通道 M-LVDS 接收器

產品詳細資料

Function Receiver Protocols M-LVDS Number of transmitters 0 Number of receivers 4 Supply voltage (V) 3.3 Signaling rate (Mbps) 250 Input signal M-LVDS Output signal LVTTL Rating Catalog Operating temperature range (°C) -40 to 85
Function Receiver Protocols M-LVDS Number of transmitters 0 Number of receivers 4 Supply voltage (V) 3.3 Signaling rate (Mbps) 250 Input signal M-LVDS Output signal LVTTL Rating Catalog Operating temperature range (°C) -40 to 85
VQFN (RGZ) 48 49 mm² 7 x 7
  • Low-voltage differential 30Ω to 55Ω line receivers for signaling rates(1) up to 250Mbps; Clock Frequencies up to 125MHz
  • Type-1 receiver incorporates 25mV of input threshold hysteresis
  • Type-2 receiver provides 100mV offset threshold to detect open-circuit and idle-bus conditions
  • Wide receiver input common-mode voltage range, –1V to 3.4V, allows 2V of ground noise
  • Meets or exceeds the M-LVDS standard TIA/EIA-899 for multipoint topology
  • High input impedance when Vcc ≤ 1.5V
  • Enhanced ESD Protection: 7kV HBM on all pins
  • 48-Pin 7 X 7 QFN (RGZ)

(1)The signaling rate of a line is the number of voltage transitions that are made per second, expressed in the units bps (bits per second).

  • Low-voltage differential 30Ω to 55Ω line receivers for signaling rates(1) up to 250Mbps; Clock Frequencies up to 125MHz
  • Type-1 receiver incorporates 25mV of input threshold hysteresis
  • Type-2 receiver provides 100mV offset threshold to detect open-circuit and idle-bus conditions
  • Wide receiver input common-mode voltage range, –1V to 3.4V, allows 2V of ground noise
  • Meets or exceeds the M-LVDS standard TIA/EIA-899 for multipoint topology
  • High input impedance when Vcc ≤ 1.5V
  • Enhanced ESD Protection: 7kV HBM on all pins
  • 48-Pin 7 X 7 QFN (RGZ)

(1)The signaling rate of a line is the number of voltage transitions that are made per second, expressed in the units bps (bits per second).

The SN65MLVD048 is a quad-channel M-LVDS receiver. This device is designed in full compliance with the TIA/EIA-899 (M-LVDS) standard, which is optimized to operate at signaling rates up to 250Mbps. Each receiver channel is controlled by a receive enable ( RE). When RE = low, the corresponding channel is enabled; when RE = high, the corresponding channel is disabled.

The M-LVDS standard defines two types of receivers, designated as Type-1 and Type-2. Type-1 receivers have thresholds centered about zero with 25mV of hysteresis to prevent output oscillations with loss of input; Type-2 receivers implement a failsafe by using an offset threshold. Receiver outputs are slew rate controlled to reduce EMI and crosstalk effects associated with large current surges.

The devices are characterized for operation from –40°C to 85°C.

The SN65MLVD048 is a quad-channel M-LVDS receiver. This device is designed in full compliance with the TIA/EIA-899 (M-LVDS) standard, which is optimized to operate at signaling rates up to 250Mbps. Each receiver channel is controlled by a receive enable ( RE). When RE = low, the corresponding channel is enabled; when RE = high, the corresponding channel is disabled.

The M-LVDS standard defines two types of receivers, designated as Type-1 and Type-2. Type-1 receivers have thresholds centered about zero with 25mV of hysteresis to prevent output oscillations with loss of input; Type-2 receivers implement a failsafe by using an offset threshold. Receiver outputs are slew rate controlled to reduce EMI and crosstalk effects associated with large current surges.

The devices are characterized for operation from –40°C to 85°C.

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類型 標題 日期
* Data sheet SN65MLVD048 Quad Channel M-LVDS Receivers datasheet (Rev. A) PDF | HTML 2024年 3月 5日
Application note An Introduction to M-LVDS and Clock and Data Distribution Applications (Rev. C) PDF | HTML 2023年 6月 22日
Application brief How Far, How Fast Can You Operate MLVDS? 2018年 8月 6日
Application note SPI-Based Data Acquisition/Monitor Using the TLC2551 Serial ADC (Rev. A) 2001年 11月 20日

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SN65MLVD048 IBIS Model

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