產品規格表
TS3DV520E
- Compatible With HDMI v1.2a (Type A) DVI 1.0
High-Speed Digital Interface- Wide Bandwidth to support throughput of
over 1.65 Gbps (Data rate 1.9 Gbps Typ) - Serial Data Stream at 10× Pixel Clock Rate
- Supports All Video Formats up to 1080p
and SXGA (1280 × 1024 at 75 Hz) - Total Raw Capacity 4.95 Gbps (Single Link)
- HDCP Compatible
- Wide Bandwidth to support throughput of
- Compatible with SXGA Video Display formats
up to 1080P (1280 × 1024 at 75Hz) - Low Crosstalk (XTALK = –37 dB Typ)
- Low Bit-to-Bit Skew (tsk(o) = 0.1 ns Max)
- Low and Flat ON-State Resistance
(ron = 4
Typ, ron(flat) = 0.5 Typ) - Low Input/Output Capacitance
(CON = 8 pF Typ) - Rail-to-Rail Switching on Data I/O Ports
(0 to 3.6 V) - VCC Operating Range From 3 V to 3.6 V
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Performance Tested
- 14-kV Human-Body Model Per JESD 22
(A114-B, Class II) - 7.5-kV Contact Discharge Per IEC 61000-4-2
- 14-kV Human-Body Model Per JESD 22
- Applications
- DVI/HDMI Signal Switching
- Differential DVI, HDMI Signal Multiplexing for
Audio/Video Receivers and High-Definition
Televisions (HDTVs)
The TS3DV520E is a 20-bit to 10-bit multiplexer/demultiplexer digital video switch with a single select (SEL) input. SEL controls the data path of the multiplexer/demultiplexer. The device provides five differential channels for digital video signal switching.
This device provides low and flat ON-state resistance (ron) and excellent ON-state resistance match. Low input/output capacitance, high bandwidth, low skew, and low crosstalk among channels make this device suitable for various digital video applications, such as DVI and HDMI.
Voltage on the SEL pin should be less or equal to VCC, even in the power-down mode
(VCC = 0 V).
技術文件
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| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | TS3DV520E 5-Channel Differential 10:20 Multiplexer Switch datasheet (Rev. B) | 2009/5/12 | |||
| * | 勘誤表 | Datasheet Errata for TS3DV520E Device Type | 2008/10/14 | |||
| 應用說明 | Differential Passive Signal Switch on Computing (Rev. A) | 2009/7/28 |
設計與開發
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|---|---|---|
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