SLUSDF9 June   2020 BQ25790

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Simplified Schematic
      1.      Device Images
  4. Revision History
  5. Description (continued)
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Device Power-On-Reset
      2. 8.3.2  PROG Pin Configuration
      3. 8.3.3  Dual-Input Power Mux
        1. 8.3.3.1 VBUS Input Only
        2. 8.3.3.2 One ACFET-RBFET
        3. 8.3.3.3 Two ACFETs-RBFETs
      4. 8.3.4  Device Power Up from Battery without Input Source
      5. 8.3.5  Device Power Up from Input Source
        1. 8.3.5.1 Power Up REGN LDO
        2. 8.3.5.2 Poor Source Qualification
        3. 8.3.5.3 Input Source Type Detection
          1. 8.3.5.3.1 D+/D– Detection Sets Input Current Limit
          2. 8.3.5.3.2 Force Input Current Limit Detection
          3. 8.3.5.3.3 Connector Fault Detection
        4. 8.3.5.4 Input Current Optimizer (ICO)
        5. 8.3.5.5 Default VINDPM Setting
        6. 8.3.5.6 Device HIZ State
        7. 8.3.5.7 ILIM_HIZ Pin
        8. 8.3.5.8 IBAT Pin for Battery Current Sensing
        9. 8.3.5.9 Buck-Boost Converter Operation
          1. 8.3.5.9.1 Pulse Frequency Modulation (PFM)
      6. 8.3.6  USB On-The-Go (OTG)
        1. 8.3.6.1 OTG Mode to Power External Devices
      7. 8.3.7  Power Path Management
        1. 8.3.7.1 Narrow VDC Architecture
        2. 8.3.7.2 Dynamic Power Management
      8. 8.3.8  Battery Charging Management
        1. 8.3.8.1 Autonomous Charging Cycle
        2. 8.3.8.2 Battery Charging Profile
        3. 8.3.8.3 Charging Termination
        4. 8.3.8.4 Charging Safety Timer
        5. 8.3.8.5 Thermistor Qualification
          1. 8.3.8.5.1 JEITA Guideline Compliance in Charge Mode
          2. 8.3.8.5.2 Cold/Hot Temperature Window in OTG Mode
      9. 8.3.9  Integrated 16-Bit ADC for Monitoring
      10. 8.3.10 Status Outputs (PG, STAT, and INT)
        1. 8.3.10.1 Power Good Indicator (PG)
        2. 8.3.10.2 Charging Status Indicator (STAT Pin)
        3. 8.3.10.3 Interrupt to Host (INT)
      11. 8.3.11 Ship FET Control
        1. 8.3.11.1 Shutdown Mode
        2. 8.3.11.2 Ship Mode
        3. 8.3.11.3 System Power Reset
      12. 8.3.12 Protections
        1. 8.3.12.1 Voltage and Current Monitoring
        2. 8.3.12.2 Thermal Regulation and Thermal Shutdown
      13. 8.3.13 Serial Interface
        1. 8.3.13.1 Data Validity
        2. 8.3.13.2 START and STOP Conditions
        3. 8.3.13.3 Byte Format
        4. 8.3.13.4 Acknowledge (ACK) and Not Acknowledge (NACK)
        5. 8.3.13.5 Slave Address and Data Direction Bit
        6. 8.3.13.6 Single Write and Read
        7. 8.3.13.7 Multi-Write and Multi-Read
    4. 8.4 Device Functional Modes
      1. 8.4.1 Host Mode and Default Mode
      2. 8.4.2 Register Bit Reset
    5. 8.5 Register Map
      1. 8.5.1 I2C Registers
        1. 8.5.1.1  REG00_Minimal_System_Voltage Register (Offset = 0h) [reset = X]
          1. Table 10. REG00_Minimal_System_Voltage Register Field Descriptions
        2. 8.5.1.2  REG01_Charge_Voltage_Limit Register (Offset = 1h) [reset = X]
          1. Table 11. REG01_Charge_Voltage_Limit Register Field Descriptions
        3. 8.5.1.3  REG03_Charge_Current_Limit Register (Offset = 3h) [reset = X]
          1. Table 12. REG03_Charge_Current_Limit Register Field Descriptions
        4. 8.5.1.4  REG05_Input_Voltage_Limit Register (Offset = 5h) [reset = 24h]
          1. Table 13. REG05_Input_Voltage_Limit Register Field Descriptions
        5. 8.5.1.5  REG06_Input_Current_Limit Register (Offset = 6h) [reset = 12Ch]
          1. Table 14. REG06_Input_Current_Limit Register Field Descriptions
        6. 8.5.1.6  REG08_Precharge_Control Register (Offset = 8h) [reset = C3h]
          1. Table 15. REG08_Precharge_Control Register Field Descriptions
        7. 8.5.1.7  REG09_Termination_Control Register (Offset = 9h) [reset = 5h]
          1. Table 16. REG09_Termination_Control Register Field Descriptions
        8. 8.5.1.8  REG0A_Re-charge_Control Register (Offset = Ah) [reset = X]
          1. Table 17. REG0A_Re-charge_Control Register Field Descriptions
        9. 8.5.1.9  REG0B_VOTG_regulation Register (Offset = Bh) [reset = DCh]
          1. Table 18. REG0B_VOTG_regulation Register Field Descriptions
        10. 8.5.1.10 REG0D_IOTG_regulation Register (Offset = Dh) [reset = 4Bh]
          1. Table 19. REG0D_IOTG_regulation Register Field Descriptions
        11. 8.5.1.11 REG0E_Timer_Control Register (Offset = Eh) [reset = 3Dh]
          1. Table 20. REG0E_Timer_Control Register Field Descriptions
        12. 8.5.1.12 REG0F_Charger_Control_0 Register (Offset = Fh) [reset = A2h]
          1. Table 21. REG0F_Charger_Control_0 Register Field Descriptions
        13. 8.5.1.13 REG10_Charger_Control_1 Register (Offset = 10h) [reset = 85h]
          1. Table 22. REG10_Charger_Control_1 Register Field Descriptions
        14. 8.5.1.14 REG11_Charger_Control_2 Register (Offset = 11h) [reset = 40h]
          1. Table 23. REG11_Charger_Control_2 Register Field Descriptions
        15. 8.5.1.15 REG12_Charger_Control_3 Register (Offset = 12h) [reset = 0h]
          1. Table 24. REG12_Charger_Control_3 Register Field Descriptions
        16. 8.5.1.16 REG13_Charger_Control_4 Register (Offset = 13h) [reset = X]
          1. Table 25. REG13_Charger_Control_4 Register Field Descriptions
        17. 8.5.1.17 REG14_Charger_Control_5 Register (Offset = 14h) [reset = 16h]
          1. Table 26. REG14_Charger_Control_5 Register Field Descriptions
        18. 8.5.1.18 REG15_Reserved Register (Offset = 15h) [reset = 00h]
          1. Table 27. REG15_Reserved Register Field Descriptions
        19. 8.5.1.19 REG16_Temperature_Control Register (Offset = 16h) [reset = C0h]
          1. Table 28. REG16_Temperature_Control Register Field Descriptions
        20. 8.5.1.20 REG17_NTC_Control_0 Register (Offset = 17h) [reset = 7Ah]
          1. Table 29. REG17_NTC_Control_0 Register Field Descriptions
        21. 8.5.1.21 REG18_NTC_Control_1 Register (Offset = 18h) [reset = 54h]
          1. Table 30. REG18_NTC_Control_1 Register Field Descriptions
        22. 8.5.1.22 REG19_ICO_Current_Limit Register (Offset = 19h) [reset = 0h]
          1. Table 31. REG19_ICO_Current_Limit Register Field Descriptions
        23. 8.5.1.23 REG1B_Charger_Status_0 Register (Offset = 1Bh) [reset = 0h]
          1. Table 32. REG1B_Charger_Status_0 Register Field Descriptions
        24. 8.5.1.24 REG1C_Charger_Status_1 Register (Offset = 1Ch) [reset = 0h]
          1. Table 33. REG1C_Charger_Status_1 Register Field Descriptions
        25. 8.5.1.25 REG1D_Charger_Status_2 Register (Offset = 1Dh) [reset = 0h]
          1. Table 34. REG1D_Charger_Status_2 Register Field Descriptions
        26. 8.5.1.26 REG1E_Charger_Status_3 Register (Offset = 1Eh) [reset = 0h]
          1. Table 35. REG1E_Charger_Status_3 Register Field Descriptions
        27. 8.5.1.27 REG1F_Charger_Status_4 Register (Offset = 1Fh) [reset = 0h]
          1. Table 36. REG1F_Charger_Status_4 Register Field Descriptions
        28. 8.5.1.28 REG20_FAULT_Status_0 Register (Offset = 20h) [reset = 0h]
          1. Table 37. REG20_FAULT_Status_0 Register Field Descriptions
        29. 8.5.1.29 REG21_FAULT_Status_1 Register (Offset = 21h) [reset = 0h]
          1. Table 38. REG21_FAULT_Status_1 Register Field Descriptions
        30. 8.5.1.30 REG22_Charger_Flag_0 Register (Offset = 22h) [reset = 0h]
          1. Table 39. REG22_Charger_Flag_0 Register Field Descriptions
        31. 8.5.1.31 REG23_Charger_Flag_1 Register (Offset = 23h) [reset = 0h]
          1. Table 40. REG23_Charger_Flag_1 Register Field Descriptions
        32. 8.5.1.32 REG24_Charger_Flag_2 Register (Offset = 24h) [reset = 0h]
          1. Table 41. REG24_Charger_Flag_2 Register Field Descriptions
        33. 8.5.1.33 REG25_Charger_Flag_3 Register (Offset = 25h) [reset = 0h]
          1. Table 42. REG25_Charger_Flag_3 Register Field Descriptions
        34. 8.5.1.34 REG26_FAULT_Flag_0 Register (Offset = 26h) [reset = 0h]
          1. Table 43. REG26_FAULT_Flag_0 Register Field Descriptions
        35. 8.5.1.35 REG27_FAULT_Flag_1 Register (Offset = 27h) [reset = 0h]
          1. Table 44. REG27_FAULT_Flag_1 Register Field Descriptions
        36. 8.5.1.36 REG28_Charger_Mask_0 Register (Offset = 28h) [reset = 0h]
          1. Table 45. REG28_Charger_Mask_0 Register Field Descriptions
        37. 8.5.1.37 REG29_Charger_Mask_1 Register (Offset = 29h) [reset = 0h]
          1. Table 46. REG29_Charger_Mask_1 Register Field Descriptions
        38. 8.5.1.38 REG2A_Charger_Mask_2 Register (Offset = 2Ah) [reset = 0h]
          1. Table 47. REG2A_Charger_Mask_2 Register Field Descriptions
        39. 8.5.1.39 REG2B_Charger_Mask_3 Register (Offset = 2Bh) [reset = 0h]
          1. Table 48. REG2B_Charger_Mask_3 Register Field Descriptions
        40. 8.5.1.40 REG2C_FAULT_Mask_0 Register (Offset = 2Ch) [reset = 0h]
          1. Table 49. REG2C_FAULT_Mask_0 Register Field Descriptions
        41. 8.5.1.41 REG2D_FAULT_Mask_1 Register (Offset = 2Dh) [reset = 0h]
          1. Table 50. REG2D_FAULT_Mask_1 Register Field Descriptions
        42. 8.5.1.42 REG2E_ADC_Control Register (Offset = 2Eh) [reset = 30h]
          1. Table 51. REG2E_ADC_Control Register Field Descriptions
        43. 8.5.1.43 REG2F_ADC_Function_Disable_0 Register (Offset = 2Fh) [reset = 0h]
          1. Table 52. REG2F_ADC_Function_Disable_0 Register Field Descriptions
        44. 8.5.1.44 REG30_ADC_Function_Disable_1 Register (Offset = 30h) [reset = 0h]
          1. Table 53. REG30_ADC_Function_Disable_1 Register Field Descriptions
        45. 8.5.1.45 REG31_IBUS_ADC Register (Offset = 31h) [reset = 0h]
          1. Table 54. REG31_IBUS_ADC Register Field Descriptions
        46. 8.5.1.46 REG33_IBAT_ADC Register (Offset = 33h) [reset = 0h]
          1. Table 55. REG33_IBAT_ADC Register Field Descriptions
        47. 8.5.1.47 REG35_VBUS_ADC Register (Offset = 35h) [reset = 0h]
          1. Table 56. REG35_VBUS_ADC Register Field Descriptions
        48. 8.5.1.48 REG37_VAC1_ADC Register (Offset = 37h) [reset = 0h]
          1. Table 57. REG37_VAC1_ADC Register Field Descriptions
        49. 8.5.1.49 REG39_VAC2_ADC Register (Offset = 39h) [reset = 0h]
          1. Table 58. REG39_VAC2_ADC Register Field Descriptions
        50. 8.5.1.50 REG3B_VBAT_ADC Register (Offset = 3Bh) [reset = 0h]
          1. Table 59. REG3B_VBAT_ADC Register Field Descriptions
        51. 8.5.1.51 REG3D_VSYS_ADC Register (Offset = 3Dh) [reset = 0h]
          1. Table 60. REG3D_VSYS_ADC Register Field Descriptions
        52. 8.5.1.52 REG3F_TS_ADC Register (Offset = 3Fh) [reset = 0h]
          1. Table 61. REG3F_TS_ADC Register Field Descriptions
        53. 8.5.1.53 REG41_TDIE_ADC Register (Offset = 41h) [reset = 0h]
          1. Table 62. REG41_TDIE_ADC Register Field Descriptions
        54. 8.5.1.54 REG43_D+_ADC Register (Offset = 43h) [reset = 0h]
          1. Table 63. REG43_D+_ADC Register Field Descriptions
        55. 8.5.1.55 REG45_D-_ADC Register (Offset = 45h) [reset = 0h]
          1. Table 64. REG45_D-_ADC Register Field Descriptions
        56. 8.5.1.56 REG47_DPDM_Driver Register (Offset = 47h) [reset = 0h]
          1. Table 65. REG47_DPDM_Driver Register Field Descriptions
        57. 8.5.1.57 REG48_Part_Information Register (Offset = 48h) [reset = 0h]
          1. Table 66. REG48_Part_Information Register Field Descriptions
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Inductor Selection
        2. 9.2.2.2 Input (VBUS / PMID) Capacitor
        3. 9.2.2.3 Output (VSYS) Capacitor
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
        1. 12.1.1.1 Third-Party Products Disclaimer
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Support Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

I2C Registers

Table 8 lists the I2C registers. All register offset addresses not listed in Table 8 should be considered as reserved locations and the register contents should not be modified.

Table 8. I2C Registers

Offset Acronym Register Name Section
0h REG00_Minimal_System_Voltage Minimal System Voltage REG00_Minimal_System_Voltage Register (Offset = 0h) [reset = X]
1h REG01_Charge_Voltage_Limit Charge Voltage Limit REG01_Charge_Voltage_Limit Register (Offset = 1h) [reset = X]
3h REG03_Charge_Current_Limit Charge Current Limit REG03_Charge_Current_Limit Register (Offset = 3h) [reset = X]
5h REG05_Input_Voltage_Limit Input Voltage Limit REG05_Input_Voltage_Limit Register (Offset = 5h) [reset = 24h]
6h REG06_Input_Current_Limit Input Current Limit REG06_Input_Current_Limit Register (Offset = 6h) [reset = 12Ch]
8h REG08_Precharge_Control Precharge Control REG08_Precharge_Control Register (Offset = 8h) [reset = C3h]
9h REG09_Termination_Control Termination Control REG09_Termination_Control Register (Offset = 9h) [reset = 5h]
Ah REG0A_Re-charge_Control Re-charge Control REG0A_Re-charge_Control Register (Offset = Ah) [reset = X]
Bh REG0B_VOTG_regulation VOTG regulation REG0B_VOTG_regulation Register (Offset = Bh) [reset = DCh]
Dh REG0D_IOTG_regulation IOTG regulation REG0D_IOTG_regulation Register (Offset = Dh) [reset = 4Bh]
Eh REG0E_Timer_Control Timer Control REG0E_Timer_Control Register (Offset = Eh) [reset = 3Dh]
Fh REG0F_Charger_Control_0 Charger Control 0 REG0F_Charger_Control_0 Register (Offset = Fh) [reset = A2h]
10h REG10_Charger_Control_1 Charger Control 1 REG10_Charger_Control_1 Register (Offset = 10h) [reset = 85h]
11h REG11_Charger_Control_2 Charger Control 2 REG11_Charger_Control_2 Register (Offset = 11h) [reset = 40h]
12h REG12_Charger_Control_3 Charger Control 3 REG12_Charger_Control_3 Register (Offset = 12h) [reset = 0h]
13h REG13_Charger_Control_4 Charger Control 4 REG13_Charger_Control_4 Register (Offset = 13h) [reset = X]
14h REG14_Charger_Control_5 Charger Control 5 REG14_Charger_Control_5 Register (Offset = 14h) [reset = 16h]
15h REG15_Reserved Reserved REG15_Reserved Register (Offset = 15h) [reset = 00h]
16h REG16_Temperature_Control Temperature Control REG16_Temperature_Control Register (Offset = 16h) [reset = C0h]
17h REG17_NTC_Control_0 NTC Control 0 REG17_NTC_Control_0 Register (Offset = 17h) [reset = 7Ah]
18h REG18_NTC_Control_1 NTC Control 1 REG18_NTC_Control_1 Register (Offset = 18h) [reset = 54h]
19h REG19_ICO_Current_Limit ICO Current Limit REG19_ICO_Current_Limit Register (Offset = 19h) [reset = 0h]
1Bh REG1B_Charger_Status_0 Charger Status 0 REG1B_Charger_Status_0 Register (Offset = 1Bh) [reset = 0h]
1Ch REG1C_Charger_Status_1 Charger Status 1 REG1C_Charger_Status_1 Register (Offset = 1Ch) [reset = 0h]
1Dh REG1D_Charger_Status_2 Charger Status 2 REG1D_Charger_Status_2 Register (Offset = 1Dh) [reset = 0h]
1Eh REG1E_Charger_Status_3 Charger Status 3 REG1E_Charger_Status_3 Register (Offset = 1Eh) [reset = 0h]
1Fh REG1F_Charger_Status_4 Charger Status 4 REG1F_Charger_Status_4 Register (Offset = 1Fh) [reset = 0h]
20h REG20_FAULT_Status_0 FAULT Status 0 REG20_FAULT_Status_0 Register (Offset = 20h) [reset = 0h]
21h REG21_FAULT_Status_1 FAULT Status 1 REG21_FAULT_Status_1 Register (Offset = 21h) [reset = 0h]
22h REG22_Charger_Flag_0 Charger Flag 0 REG22_Charger_Flag_0 Register (Offset = 22h) [reset = 0h]
23h REG23_Charger_Flag_1 Charger Flag 1 REG23_Charger_Flag_1 Register (Offset = 23h) [reset = 0h]
24h REG24_Charger_Flag_2 Charger Flag 2 REG24_Charger_Flag_2 Register (Offset = 24h) [reset = 0h]
25h REG25_Charger_Flag_3 Charger Flag 3 REG25_Charger_Flag_3 Register (Offset = 25h) [reset = 0h]
26h REG26_FAULT_Flag_0 FAULT Flag 0 REG26_FAULT_Flag_0 Register (Offset = 26h) [reset = 0h]
27h REG27_FAULT_Flag_1 FAULT Flag 1 REG27_FAULT_Flag_1 Register (Offset = 27h) [reset = 0h]
28h REG28_Charger_Mask_0 Charger Mask 0 REG28_Charger_Mask_0 Register (Offset = 28h) [reset = 0h]
29h REG29_Charger_Mask_1 Charger Mask 1 REG29_Charger_Mask_1 Register (Offset = 29h) [reset = 0h]
2Ah REG2A_Charger_Mask_2 Charger Mask 2 REG2A_Charger_Mask_2 Register (Offset = 2Ah) [reset = 0h]
2Bh REG2B_Charger_Mask_3 Charger Mask 3 REG2B_Charger_Mask_3 Register (Offset = 2Bh) [reset = 0h]
2Ch REG2C_FAULT_Mask_0 FAULT Mask 0 REG2C_FAULT_Mask_0 Register (Offset = 2Ch) [reset = 0h]
2Dh REG2D_FAULT_Mask_1 FAULT Mask 1 REG2D_FAULT_Mask_1 Register (Offset = 2Dh) [reset = 0h]
2Eh REG2E_ADC_Control ADC Control REG2E_ADC_Control Register (Offset = 2Eh) [reset = 30h]
2Fh REG2F_ADC_Function_Disable_0 ADC Function Disable 0 REG2F_ADC_Function_Disable_0 Register (Offset = 2Fh) [reset = 0h]
30h REG30_ADC_Function_Disable_1 ADC Function Disable 1 REG30_ADC_Function_Disable_1 Register (Offset = 30h) [reset = 0h]
31h REG31_IBUS_ADC IBUS ADC REG31_IBUS_ADC Register (Offset = 31h) [reset = 0h]
33h REG33_IBAT_ADC IBAT ADC REG33_IBAT_ADC Register (Offset = 33h) [reset = 0h]
35h REG35_VBUS_ADC VBUS ADC REG35_VBUS_ADC Register (Offset = 35h) [reset = 0h]
37h REG37_VAC1_ADC VAC1 ADC REG37_VAC1_ADC Register (Offset = 37h) [reset = 0h]
39h REG39_VAC2_ADC VAC2 ADC REG39_VAC2_ADC Register (Offset = 39h) [reset = 0h]
3Bh REG3B_VBAT_ADC VBAT ADC REG3B_VBAT_ADC Register (Offset = 3Bh) [reset = 0h]
3Dh REG3D_VSYS_ADC VSYS ADC REG3D_VSYS_ADC Register (Offset = 3Dh) [reset = 0h]
3Fh REG3F_TS_ADC TS ADC REG3F_TS_ADC Register (Offset = 3Fh) [reset = 0h]
41h REG41_TDIE_ADC TDIE_ADC REG41_TDIE_ADC Register (Offset = 41h) [reset = 0h]
43h REG43_D+_ADC D+ ADC REG43_D+_ADC Register (Offset = 43h) [reset = 0h]
45h REG45_D-_ADC D- ADC REG45_D-_ADC Register (Offset = 45h) [reset = 0h]
47h REG47_DPDM_Driver DPDM Driver REG47_DPDM_Driver Register (Offset = 47h) [reset = 0h]
48h REG48_Part_Information Part Information REG48_Part_Information Register (Offset = 48h) [reset = 0h]

Complex bit access types are encoded to fit into small table cells. Table 9 shows the codes that are used for access types in this section.

Table 9. I2C Access Type Codes

Access Type Code Description
Read Type
R R Read
Write Type
W W Write
Others
Range The register bits are only valid in this defined range.
Clamped Low Any write on the register lower than the minimal value of the valid range, will be ignored by the charger
Clamped High Any write on the register higher than the maximum value of the valid range, will be ignored by the charger