8.5.1.41 REG2D_FAULT_Mask_1 Register (Offset = 2Dh) [reset = 0h]
REG2D_FAULT_Mask_1 is shown in Figure 79 and described in Table 50.
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FAULT Mask 1
Figure 79. REG2D_FAULT_Mask_1 Register
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
VSYS_SHORT_MASK |
VSYS_OVP_MASK |
OTG_OVP_MASK |
OTG_UVP_MASK |
RESERVED |
TSHUT_MASK |
RESERVED |
R/W-0h |
R/W-0h |
R/W-0h |
R/W-0h |
R/W-0h |
R/W-0h |
R-0h |
|
Table 50. REG2D_FAULT_Mask_1 Register Field Descriptions
Bit |
Field |
Type |
Reset |
Notes |
Description |
7 |
VSYS_SHORT_MASK |
R/W |
0h |
Reset by:
REG_RST
|
VSYS short circuit mask flag
Type : RW
POR: 0b
0h = System short fault does produce INT
1h = System short fault does NOT produce INT
|
6 |
VSYS_OVP_MASK |
R/W |
0h |
Reset by:
REG_RST
|
VSYS over-voltage mask flag
Type : RW
POR: 0b
0h = System over-voltage fault does produce INT
1h = System over-voltage fault does NOT produce INT
|
5 |
OTG_OVP_MASK |
R/W |
0h |
Reset by:
REG_RST
|
OTG over-voltage mask flag
Type : RW
POR: 0b
0h = OTG VBUS over-voltage fault does produce INT
1h = OTG VBUS over-voltage fault does NOT produce INT
|
4 |
OTG_UVP_MASK |
R/W |
0h |
Reset by:
REG_RST
|
OTG under-voltage mask flag
Type : RW
POR: 0b
0h = OTG VBUS under voltage fault does produce INT
1h = OTG VBUS under voltage fault does NOT produce INT
|
3 |
RESERVED |
R/W |
0h |
|
RESERVED |
2 |
TSHUT_MASK |
R/W |
0h |
Reset by:
REG_RST
|
IC thermal shutdown mask flag
Type : RW
POR: 0b
0h = TSHUT does produce INT
1h = TSHUT does NOT produce INT
|
1-0 |
RESERVED |
R |
0h |
|
RESERVED |