8.5.1.8 REG0A_Re-charge_Control Register (Offset = Ah) [reset = X]
REG0A_Re-charge_Control is shown in Figure 46 and described in Table 17.
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Re-charge Control
Figure 46. REG0A_Re-charge_Control Register
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
CELL_1:0 |
TRECHG_1:0 |
VRECHG_3:0 |
R/W-X |
R/W-2h |
R/W-3h |
|
Table 17. REG0A_Re-charge_Control Register Field Descriptions
Bit |
Field |
Type |
Reset |
Notes |
Description |
7-6 |
CELL_1:0 |
R/W |
X |
|
At POR, the charger reads the PROG pin resistance to determine the battery cell count and update this CELL bits accordingly.
Type : RW
0h = 1s
1h = 2s
2h = 3s
3h = 4s
|
5-4 |
TRECHG_1:0 |
R/W |
2h |
Reset by:
WATCHDOG
REG_RST
|
Battery recharge deglich time
Type : RW
POR: 10b
0h = 64ms
1h = 256ms
2h = 1024ms (default)
3h = 2048ms
|
3-0 |
VRECHG_3:0 |
R/W |
3h |
Reset by:
WATCHDOG
REG_RST
|
Battery Recharge Threshold Offset (Below VREG)
Type : RW
POR: 200mV (3h)
Range : 50mV-800mV
Fixed Offset : 50mV
Bit Step Size : 50mV |