Enable the PDR control loop.
EN_PDR_x register setting.
Set the active PWM half-bridge
(DRV8718-Q1 only). SET_AGD_x register setting. Note: The advance driver control
settings are shared between each half-bridge pair (1/2, 3/4, 5/6, and 7/8) for
Set the target tON and
tOFF propagation delay. T_DON_DOFF_x register setting. It is
recommended to maintain a value greater than 700 ns to accommodate driver and
Adjust initial current
values. PRE_CHR_INIT_x, PRE_DCHR_INIT_x register settings.
Adjust pre-charge and
pre-discharge time duration. T_PRE_CHR_x, T_PRE_DCHR_x register
Adjust the proportional
gain controller strength. KP_PDR_x register setting.
Adjust the maximum
current level threshold. PRE_MAX_x, register settings.