SBOSA39A April   2025  – October 2025 THS3470

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics ±VS = ±30V
    6. 5.6 Electrical Characteristics ±VS = ±20V
    7. 5.7 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Output Current Limit
      2. 6.3.2 Output Current Enable
      3. 6.3.3 Over Temperature Flag
      4. 6.3.4 Output Current Flags
      5. 6.3.5 Output Current Monitoring
      6. 6.3.6 Die Temperature Monitoring
      7. 6.3.7 External Compensation
    4. 6.4 Device Functional Modes
      1. 6.4.1 Power Modes
      2. 6.4.2 Choosing a Feedback Resistor
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 High-Voltage, High-Precision, Composite Amplifier
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curves
      2. 7.2.2 120V Bootstrap Amplifier
        1. 7.2.2.1 Design Requirements
        2. 7.2.2.2 Detailed Design Procedure
        3. 7.2.2.3 Application Performance Plots
    3. 7.3 Short Circuit Protection
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Thermal Considerations
        1. 7.5.1.1 Top-Side Cooling Benefits
        2. 7.5.1.2 THS3470 Safe Operating Area
      2. 7.5.2 Layout Guidelines
      3. 7.5.3 Layout Example
  9. Device and Documentation Support
    1. 8.1 Documentation Support
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 TAPE AND REEL INFORMATION

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • REB|42
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Output Current Enable

The THS3470 features two pins, ISNK_LIMIT_EN and ISRC_LIMIT_EN that allow toggling of the internal current limiting features set by the ISNK_LIMIT and ISRC_LIMIT pins.

If the ISNK_LIMIT_EN pin is connected low, the internal current limit for sinking current is activated, and the current at the VOUT pin is regulated according to the ISNK_LIMIT configuration. If the ISNK_LIMIT_EN is connected high, the internal current limit for sinking current is deactivated and limited by the inherent maximum allowable current (2.1A). Regardless of the ISNK_LIMIT_EN pin configuration, the ISNK_FLAG pin triggers when the VOUT sinking current exceeds the threshold dictated by the ISNK_LIMIT configuration.

For the ISNK_LIMIT_EN disabled case, use this functionality as a warning flag when the device is approaching a limit that must be monitored closely for system health using the IOUT pin or the OVTEMP_FLAG pin. This approach gives designers an option to better control when to disable or shutdown the device on a microcontroller; Figure 6-3 shows this option. If the application does not require fine control of the current limit, designers can hard connect the ISNK_FLAG pin to the ISNK_LIMIT_EN pin; Figure 6-3 also shows this option.

THS3470 Output Current Enable
                    Schematic Figure 6-3 Output Current Enable Schematic

The ISRC_LIMIT_EN, ISRC_LIMIT, and ISRC_FLAG pins all function identically to the sinking current equivalents, but instead govern the sourcing limits of the VOUT pin.