SBOSA39A April   2025  – October 2025 THS3470

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics ±VS = ±30V
    6. 5.6 Electrical Characteristics ±VS = ±20V
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Output Current Limit
      2. 6.3.2 Output Current Enable
      3. 6.3.3 Over Temperature Flag
      4. 6.3.4 Output Current Flags
      5. 6.3.5 Output Current Monitoring
      6. 6.3.6 Die Temperature Monitoring
      7. 6.3.7 External Compensation
    4. 6.4 Device Functional Modes
      1. 6.4.1 Power Modes
      2. 6.4.2 Choosing a Feedback Resistor
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 High-Voltage, High-Precision, Composite Amplifier
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curves
      2. 7.2.2 120V Bootstrap Amplifier
        1. 7.2.2.1 Design Requirements
        2. 7.2.2.2 Detailed Design Procedure
        3. 7.2.2.3 Application Performance Plots
    3. 7.3 Short Circuit Protection
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Thermal Considerations
        1. 7.5.1.1 Top-Side Cooling Benefits
        2. 7.5.1.2 THS3470 Safe Operating Area
      2. 7.5.2 Layout Guidelines
      3. 7.5.3 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 TAPE AND REEL INFORMATION

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • REB|42
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.4.1 Power Modes

The THS3470 features two power-mode control pins P0 (pin 31) and P1 (pin 30) that set the power level of the device. These pins are controlled by connecting the pins to either VDD or DGND of the THS3470. Table 6-5 shows the configurable options for the THS3470.

Note: The majority of the Electrical Characteristics parameters are measured in the full bias mode of the device.
Table 6-4 THS3470 Power Modes
P0 P1 MODE
DGND DGND Power Down
VDD DGND Low Bias
DGND VDD Mid Bias
VDD VDD Full Bias

Special care must be taken when the device is in the Power Down state to limit the input current. System designers need to set the input voltage of the device is set so the non-inverting and inverting terminals are at the same voltage potential. Since the THS3470 has anti-parallel diodes to protect the input devices, setting a differential voltage across the inputs during a power down state can conduct current and potentially exceed the absolute maximum allowed current for the input pins. For more information regarding the absolute maximum current on the input pins, refer to Section 5.1

Figures Figure 6-11, Figure 6-12, Figure 6-13, and Figure 6-14 show how the THS3470 performance changes with bias mode for the most prevalent application test conditions. Designers need to evaluate the frequency performance in the specific application of interest to gain proper insight into whether a lower power mode provides acceptable performance. Special consideration must be given when RFB values of less than 2kΩ are chosen to improve the bandwidth or isolation resistors smaller than 5Ω are used in tandem with varying capacitive loads.

THS3470 Small-signal Bandwidth vs Frequency (RF = 2kΩ, RS = 5Ω, CL = 1nF)Figure 6-11 Small-signal Bandwidth vs Frequency (RF = 2kΩ, RS = 5Ω, CL = 1nF)
THS3470 Large-signal Step Response vs Frequency (RF = 2kΩ, RS = 5Ω, CL = 1nF)Figure 6-13 Large-signal Step Response vs Frequency (RF = 2kΩ, RS = 5Ω, CL = 1nF)
THS3470 Large-signal Bandwidth vs Frequency (RF = 2kΩ, RS = 5Ω, CL = 1nF)Figure 6-12 Large-signal Bandwidth vs Frequency (RF = 2kΩ, RS = 5Ω, CL = 1nF)
THS3470 Quiescent Current vs Supply VoltageFigure 6-14 Quiescent Current vs Supply Voltage