SBOSA39A April 2025 – October 2025 THS3470
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
The THS3470 is designed to operate on power supplies ranging from ±6V to ±30V (single-ended supplies of 12V to 60V). Use a power-supply accuracy of 5% or better. Power supplies must be designed for the expected maximum output current from VOUT for both resistive and capacitive loads. The THS3470 current limit circuitry does not limit the current for rapid transient currents, so adequate bypass capacitance on the VCC and VEE pins is mandatory. Place a 22μF tantalum or electrolytic capacitor and a 10μF X7R capacitor near the supply sources for VCC and VEE to provide bulk decoupling. VCC (pins 8–10, 25–27, 38–39), VEE (pins 15, 20, 29, 36, 41), VMID (pins 1–2), and VDD (pin 32) pins all require 100nF C0G or NP0 capacitors per pin grouping as shown in Section 7.5.3. Place the 100nF C0G or NP0 capacitors as close as possible to the THS3470 pins. In addition, shorten the current return path of the bypass capacitor ground connections as much as possible to minimize loop inductance. Ensure that all capacitors are rated for the correct voltages.