SBOSA39A April   2025  – October 2025 THS3470

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics ±VS = ±30V
    6. 5.6 Electrical Characteristics ±VS = ±20V
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Output Current Limit
      2. 6.3.2 Output Current Enable
      3. 6.3.3 Over Temperature Flag
      4. 6.3.4 Output Current Flags
      5. 6.3.5 Output Current Monitoring
      6. 6.3.6 Die Temperature Monitoring
      7. 6.3.7 External Compensation
    4. 6.4 Device Functional Modes
      1. 6.4.1 Power Modes
      2. 6.4.2 Choosing a Feedback Resistor
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 High-Voltage, High-Precision, Composite Amplifier
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curves
      2. 7.2.2 120V Bootstrap Amplifier
        1. 7.2.2.1 Design Requirements
        2. 7.2.2.2 Detailed Design Procedure
        3. 7.2.2.3 Application Performance Plots
    3. 7.3 Short Circuit Protection
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Thermal Considerations
        1. 7.5.1.1 Top-Side Cooling Benefits
        2. 7.5.1.2 THS3470 Safe Operating Area
      2. 7.5.2 Layout Guidelines
      3. 7.5.3 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 TAPE AND REEL INFORMATION

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • REB|42
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.3.5 Output Current Monitoring

The IOUT_MONITOR pin is used to monitor the output current (IOUT) that is entering (sinking) or exiting (sourcing) the VOUT pin. To monitor the output current, the IOUT_MONITOR pin uses an internal current mirror to create a scaled-down current source that mirrors the output current through the VOUT pin. Equation 4 shows the equation that governs the relationship of the IOUT_MONITOR pin and output current.

Equation 4. I O U T _ M O N I T O R   =   I O U T 2048

For example, if the VOUT pin is sourcing 204.8mA, the IOUT_MONITOR pin sources 100µA. Alternatively, if the VOUT pin is sinking 204.8mA, the IOUT_MONITOR pin sinks 100µA.

CAUTION: Keep IOUT_MONITOR within 5V of the VMID pin. Failure to adhere to this caution can result in damage to the device.

To read the IOUT_MONITOR current with an ADC, include the external transimpedance circuit shown in Figure 6-6. This circuit is intended to achieve three key objectives. The first objective is to convert the IOUT_MONITOR pin current to a voltage (VOUT_TIA) that scales to match the ADC range (VADC_RANGE). The second objective is to shift the VOUT_TIA voltage to 1/2 VADC_RANGE when IOUT_MONITOR is equal to 0A. The last objective is to keep the IOUT_MONITOR pin within ±5V of the VMID voltage.

THS3470 IOUT_2048 Transimpedance Schematic Figure 6-6 IOUT_2048 Transimpedance Schematic

Resistor R1 in the transimpedance circuit is ultimately responsible for converting the maximum expected current (IMAX) from IOUT_MONITOR into a voltage that is optimized for the VADC_RANGE. To calculate R1 for the transimpedance circuit, use Equation 5.

Equation 5. R 1 =   V A D C _ R A N G E I M A X

For example, if the maximum expected current (typically governed by the output-current-limit pin configurations) is ±1A, the IMAX current is 1A / 2048 = 488µA. If a 3.3V ADC is used in the application, the VADC_RANGE for the application is 3.3V. Plugging these values into Equation 5 results in an R1 value of 3.381kΩ.

Resistor R2 in the transimpedance circuit is responsible for shifting VOUT_TIA to 1/2 of VADC_RANGE when IOUT_MONITOR is equal to 0A. To shift, use a proper reference voltage (VBIAS) that depends on the supply configuration of the THS3470. If the device is operating in a positive single-ended supply configuration (that is, VCC = 60V and VEE = 0V), then VBIAS can be connected to the VCC pin. If the device is operating in a negative single-ended supply configuration (that is, VCC = 0V and VEE = –60V), then VBIAS can be connected to the VEE pin. If the device is operating in a split-supply configuration (that is, VCC = 30V and VEE = –30V), then VBIAS can be connected to the ADC supply voltage (VADC). Ultimately, there is a large permutation of VBIAS voltages than can be used, but the suggested options are selected based on the available voltages already existing in the design. Equation 6 shows how to calculate R2 after the VBIAS voltage has been selected.

Equation 6. R 2 =   R 1 × V B I A S -   V M I D V M I D -   V A D C _ R A N G E 2

For example, if the R1 resistor is sized to convert a ±488µA current from IOUT_MONITOR to ±1.65V at VOUT_TIA, then the R2 resistor is selected to move the VOUT_TIA voltage to 1.65V (½ VADC_RANGE) when the IOUT_MONITOR current is 0A. The supply in this example is a split-supply configuration; therefore, VBIAS is tied to the ADC supply voltage VADC, which is 3.3V. The VMID voltage is always the average of VCC and VEE, resulting in a voltage of 0V for this example. Plugging in these values to Equation 6 results in an R2 value of 30kΩ.

The last resistor in the transimpedance amplifier circuit is R3, which is responsible for keeping the IOUT_MONITOR voltage within ±5V of the VMID voltage. R3 is also responsible for protecting the pin during start-up events for the THS3470, and is scaled to limit the input current to < 10mA. The noninverting input pin of the transimpedance amplifier is connected to VMID as well as the inverting input pin through negative feedback; therefore, R3 is sized to limit the voltage drop across R3 to ±4.5V. The maximum current that the THS3470 can provide is 2.1A at IOUT, which results in a maximum allowable current of approximately ±1mA from IOUT_MONITOR. Dividing the maximum allowable voltage of ±4.5V by the maximum current of ±1mA results in a resistance value of 4.5kΩ for R3.

After the components and bias voltages have been selected, Section 6.3.5 is used to convert VOUT_TIAvoltage read by the ADC to IOUT. In addition, Table 6-3 lists some common use cases to help select resistors and bias voltages.

Equation 7. I O U T = 2048 × V O U T _ T I A -   V M I D R 1    

Table 6-3 IOUT_2048 Transimpedance Amplifier Configuration (VADC = 3.3V, IMAX = 1A, R1 = 3.381kΩ)
USE CASE R2 (kΩ) VBIAS (V) V+ (V) V– (V)
Split supply (±20V) 40.96 VEE VADC 0
Split supply (±30V) 61.44 VEE VADC 0
Single ended (40V) 3.683 VCC VMID 0
Single ended (60V) 3.576 VCC VMID 0
Single ended (–40V) 3.121 VEE V VMID
Single ended (–60V) 3.203 VEE VADC VMID
Note: VADC is the ADC supply voltage.