SLUSCC7C July 2016 – June 2018 TPS546C23
The power-stage input-decoupling capacitance (effective capacitance at the PVIN and PGND pins) must be sufficient to supply the high switching currents demanded when the high-side MOSFET switches on, while providing minimal input-voltage ripple as a result. This effective capacitance includes any DC-bias effects. The voltage rating of the input capacitor must be greater than the maximum input voltage with derating. The capacitor must also have a ripple-current rating greater than the maximum input-current ripple to the device during full load. Use Equation 25 to estimate the input RMS current.
The minimum input capacitance and ESR values for a given input voltage-ripple specification, VIN(ripple), are shown in Equation 26 and Equation 27. The input ripple is composed of a capacitive portion (VRIPPLE(cap)) and a resistive portion (VRIPPLE(esr)).
The value of a ceramic capacitor varies significantly over temperature and the amount of DC bias applied to the capacitor. The capacitance variations because of temperature can be minimized by selecting a dielectric material that is stable over temperature. X5R and X7R ceramic dielectrics are usually selected for power-regulator capacitors because these components have a high capacitance-to-volume ratio and are fairly stable over temperature. The input capacitor must also be selected with consideration of the DC bias. For this example design, a ceramic capacitor with at least a 25-V voltage rating is required to support the maximum input voltage. For this design, allow 0.1-V input ripple for VRIPPLE(cap) and 0.2-V input ripple for VRIPPLE(esr). Using Equation 26 and Equation 27, the minimum input capacitance for this design is 64.8 µF, and the maximum ESR is 5 mΩ. For this design example, four 22-μF, 25-V ceramic capacitors, three 6800-pF, 25-V ceramic capacitors, and two additional 100-μF, 25-V low-ESR electrolytic capacitors in parallel were selected for the power stage with sufficient margin.
A high-frequency PVIN-bypass capacitor is suggested to be placed close to power stage to help with ringing reduction. .