SLUSCC7C July 2016 – June 2018 TPS546C23
This bit sets the over temperature fault response to either ignore or not. The default for this bit is 0.
|0||The PMBus device continues operation without interruption. Note: In this “ignore” fault response mode, the associated fault status bits are set. Additionally, SMBALERT continues to be triggered if it is not masked.|
|1||The PMBus device shuts down and restarts according to RS[2:0].|