SLUSCC7C July 2016 – June 2018 TPS546C23
The devices implement low-side MOSFET overcurrent protection with programmable fault and warning thresholds. The IOUT_OC_FAULT_LIMIT and IOUT_OC_WARN_LIMIT commands set the low-side overcurrent thresholds.
If an overcurrent event is detected in a given switching cycle, the device increments an overcurrent counter as shown in Figure 32. When the device detects three consecutive overcurrent events (either high-side or low-side), the converter responds by flagging the appropriate status registers, triggering the SMBALERT signal if it is not masked, and entering either continuous-restart-hiccup mode or latches off according to the IOUT_OC_FAULT_RESPONSE command. In continuous-restart-hiccup mode, the devices implement a seven TON_RISE time, followed by a normal soft-start attempt. When the overcurrent fault clears, normal operation resumes, otherwise, the device detects overcurrent and the process repeats. The IOUT_OC_FAULT_RESPONSE command can also be set to ignore the OC fault for debugging purposes. Table 2 summarizes the fault-response scheme.