Apply AC-coupling capacitors to the LVDS output when interfacing with non-LVDS receivers and to reconfigure the VCM. Provide the necessary differential termination required by the LVDS driver. Example termination is explained in the following sections.

AC-Coupled LVDS to LVPECL

For LVDS to LVPECL translation, terminate after the AC-coupling capacitors to set the common-mode voltage to VCC − 1.3V. Such resistor network provides the 100Ω differential termination required by the LVDS driver.

Figure 3-11 AC-Coupled LVDS to LVPECL

AC-Coupled LVDS to HCSL

For LVDS to HCSL translation, use a resistor network after the capacitors to set the common-mode voltage to 350mV. The termination on the receiver side must provide the 100Ω differential termination required by the LVDS driver.

Figure 3-12 AC-Coupled LVDS to HCSL

AC-Coupled LVDS to LP-HCSL

For LVDS to LP-HCSL translation, terminate the LVDS driver before the AC-coupling capacitors and directly route the AC-coupled outputs to the LP-HCSL receiver.

Figure 3-13 AC-Coupled LVDS to LP-HCSL

AC-Coupled LVDS to LVDS With Internal Biasing

For LVDS to drivers with internal biasing, terminate the LVDS driver before the AC-coupling capacitors. Some clock receivers which follow this termination scheme are LMK0482x and LMK04832 are receivers which have internal biasing and require this method.

Figure 3-14 AC-Coupled LVDS to LVDS With Internal Biasing

AC-Coupled LVDS to LVDS With Internal Biasing and Termination

For LVDS to drivers with internal termination and biasing, only the AC-coupling capacitors are required. Some clock receivers which follow this termination scheme are LMK05318B, LMK5B family (such as LMK5B33216), and LMKCA family (such as LMK5C33216A). Note that the input buffer register must be configured to internal 100Ω differential termination.

Figure 3-15 AC-Coupled LVDS to LVDS with Internal Biasing and Termination

AC-Coupled LVDS to Receivers With A Biasing Pin

For receivers with a biasing pin (such as the V_{AC_REF} pin), follow the recommended termination from the data sheet. A 0.1uF capacitor to ground can be required depending on the receiver. Some clock receivers which follow this termination scheme are the LMK1Dxxxx family (such as LMK1D1208) and CDCLVPxxxx family (such as CDCLVP1208). Note that the LMK1Dxxx family also supports DC-coupled inputs with external 100Ω differential termination, but the V_{AC_REF} pin must be left floating.

Figure 3-16 AC-Coupled LVDS to LMK1Dxxxx

Figure 3-17 AC-Coupled LVDS to CDCLVPxxxx

AC-Coupled AC-LVDS to LVDS

For AC-LVDS type outputs (as seen in LMK05318B), termination before the AC-coupling capacitors is not required because the driver is internally biased and terminated. The capacitors can be placed on the receiver or driver side. Do not DC-couple the signal unless the output VCM meets the receiver specification.

Figure 3-18 AC-Coupled AC-LVDS to LVDS