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  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1 Introduction
  5. 2 Pierce Oscillator and Crystal Model
    1. 2.1 Oscillator Block Diagram
    2. 2.2 Quartz Crystal Electrical Model
  6. 3 Crystal Selection Criteria
    1. 3.1 Why ESR Governs Crystal Compatibility
    2. 3.2 Crystal Frequency
    3. 3.3 Shunt Capacitance C0
  7. 4 Step-by-step Crystal Selection Process
    1. 4.1 Step 1 - Verify ESR Meets Oscillator Requirements
    2. 4.2 Step 2 - Size Load Capacitors CL1 and CL2
    3. 4.3 Step 3 - Determine if Damping Resistor Rd is Required
    4. 4.4 Step 4 - Calculate Rd (Damping Resistor)
    5. 4.5 Step 5 - Verify Negative Resistance (Rneg) Margin
  8. 5 PCB Layout Recommendations
    1. 5.1 Crystal Placement
    2. 5.2 Load Capacitor Placement
    3. 5.3 Trace Routing
    4. 5.4 Shielding Considerations
  9. 6 Testing and Validation
    1. 6.1 Measurement Equipment Requirements
    2. 6.2 Frequency Verification
    3. 6.3 Start-Up Time Measurement
    4. 6.4 Negative Resistance (Rneg) Measurement
  10. 7 Common Issues and Debug Tips
  11. 8 Design Example - 20MHz Crystal
  12. 9 Appendix A
    1. 9.1 Crystal Selection for Generic Pierce Oscillators
      1. 9.1.1 Introduction and Scope
      2. 9.1.2 Theoretical Background
      3. 9.1.3 Method A - Analytical Derivation from gm_min
        1. 9.1.3.1 Equipment and Component Requirements
        2. 9.1.3.2 Procedure
        3. 9.1.3.3 Single-Frequency Oscillator Considerations
        4. 9.1.3.4 Worked Example — 40MHz Fixed-Frequency Oscillator
      4. 9.1.4 Method B - Empirical Derivation using Negative Resistance Test
        1. 9.1.4.1 Equipment and Component Requirements
        2. 9.1.4.2 Signal Generator as Crystal Substitute
        3. 9.1.4.3 Equations
        4. 9.1.4.4 Procedure
        5. 9.1.4.5 Alternative Experimental Methods for Deriving gm
          1. 9.1.4.5.1 Load Capacitance (CL) Sweep
          2. 9.1.4.5.2 Supply Voltage (VDD) Sweep
          3. 9.1.4.5.3 Temperature Sweep (Thermal Margin Identification)
        6. 9.1.4.6 Generating a Custom ESR/CL Requirement Table
      5. 9.1.5 Method C - Frequency Pulling Characterization
        1. 9.1.5.1 Required Equipment and Components
        2. 9.1.5.2 Equations
        3. 9.1.5.3 Procedure
        4. 9.1.5.4 Worked Example - 40MHz Frequency Pulling
      6. 9.1.6 Summary Checklist - Generic Pierce Oscillator Crystal Selection
  13. 10References

2.2 Quartz Crystal Electrical Model

A quartz crystal is electrically represented by the Butterworth-Van Dyke (BVD) equivalent circuit as shown in Figure 2-2.

Quartz Crystal Electrical Representation Figure 2-2 Quartz Crystal Electrical Representation

It consists of:

  • Lm (motional inductance) - represents the vibrating mechanical mass of the crystal
  • Cm (motional capacitance) - represents the mechanical elasticity of the crystal
  • Rm (motional resistance) - represents internal resistive losses in the crystal
  • C0 (shunt capacitance) - capacitance formed by the crystal electrodes and package parasitics
  • CL (load capacitance) - external capacitance seen at the crystal pins; determines frequency

The key derived parameter is equivalent series resistance (ESR), which is the effective resistive load the crystal presents to the oscillator at resonance. ESR is calculated from the crystal component values as:

Equation 1. E S R =   R m × 1 +   C 0 ∕   C L 2

When CL >> C0, ESR approaches Rm. In practice, C0 is specified in the crystal datasheet (typically 1pF to 7pF), and the design target is to keep it as low as possible. Higher ESR means lower resonator Q, which makes start-up harder and sustained oscillation less stable. ESR increases as CL decreases, so using the minimum required CL is important for keeping ESR low.