The TPS65214 offers a total of two linear regulators. LDO1 is a general purpose LDO intended to provide power to analog circuitry on the SOC or peripherals. The LDO supports an output current of 300mA. LDO2 is a general purpose LDO intended to provide power to digital circuitry on the SOC and peripherals. The LDO supports an output current of 500mA.

Operational Modes

Both LDO1 and LDO2 have an input voltage range from 2.5V to 5.5V, and must be connected directly to the system power. The output voltage is programmable in the range of 0.6V to 3.3V in 50 mV-steps. The LDOs support Load-switch mode (LSW_mode): in this case, output voltages of 2.5V up to 3.4V are supported. In LSW_mode, the desired voltage does not need to be configured in the LDOx_VOUT register.

• The LDOs can be configured as linear regulators or configured as a load-switch (LSW-mode). The mode is configured by LDOx_LSW_CONFIG bit in LDOx_VOUT register.

• The ON/OFF state of the LDOs in ACTIVE state is controlled by the corresponding LDOx_EN bit in the ENABLE_CTRL register.
• The ON/OFF state of the LDOs in STBY state is controlled by the corresponding LDOx_STBY_EN bit in the STBY_1_CONFIG register.
• In INITIALIZE and SLEEP state, the LDOs are off, regardless of bit-settings.

Active Discharge

The LDOs have an active discharge function. Whenever LDOx is not enabled, the output is discharged to ground. The discharge function can be deactivated individually per rail in the DISCHARGE_CONFIG register.

• Prior to enabling a rail in the power sequence, the device discharges the rail to avoid starting into a pre-biased output.
• If a rail is enabled by an I2C-command, active discharge is not enforced, but the rail is only enabled if the output voltage is below the SCG-threshold.
• This register is not EEPROM-backed and is reset if the device enters OFF-state.
• When in INITIALIZE state (during RESET or an I2C-OFF-request), the discharge configuration is not reset. Note: the power-down-sequence can be violated if the discharge function is not enabled.

Dynamic Voltage Scaling

All LDOs support Dynamic Voltage Scaling (DVS). The output-voltage can be changed during the operation to optimize the operating voltage for the operation point of the load. The voltage change is controlled by writing to LDO1_VSET or LDO2_VSET in the corresponding LDO1_VOUT or LDO2_VOUT register. During a DVS-induced voltage transition, the active discharge function is temporarily enabled, irrespective of the discharge-configuration.

The LDOs can be configured for DVS upon STBY-request via the MODE/STBY pin or I2C. When a STBY-request is received, all LDOs that are enabled in the STBY_1_CONFIG register and configured for DVFS by bit LDOx_DVS_STBY are changed to the output voltages specified by LDOx_VSET_STBY in the LDOx_VOUT_STBY registers. If LDOx_DVS_STBY is cleared while in STBY, the output voltage reverts to LDOx_VSET. If LDOx_DVS_STBY is not set, the corresponding LDOx output voltage is not changed when transitioning from the ACTIVE to STBY state.

Figure 7-7 LDO DVS Timing Diagram

Output Capacitance Requirements

The LDO regulators require sufficient output-capacitance for stability. The required minimum and supported maximum capacitance depends on the configuration:

• In LDO-mode, a minimum capacitance of 1.2uF is required and a maximum total load capacitance (output filter and point-of-load combined) of 40uF is supported
• In LSW-mode, a minimum capacitance of 1.2uF is required and a maximum total capacitance (output filter and point-of-load combined) of 50uF is supported

LDO Fault Handling

Undervoltage (UV) Monitor

The TPS65214 detects undervoltages on the LDO-outputs. The undervoltage threshold is configured by the LDOx_UV_THR bit in the LDOx_VOUT register. The reaction to an undervoltage detection is dependent on the configuration of the LDOx_UV_MASK bit in INT_MASK_LDO register and the MASK_EFFECT in INT_MASK_BUCKS register. If not masked, the device sets bit INT_LDO_1_2_IS_SET in INT_SOURCE register and bit LDOx_UV in INT_LDO_1_2 register.

During a voltage transition (for example, at power-up), the device blanks
the undervoltage detection by default and activates the undervoltage detection when the voltage transition
completed. If the device detects an undervoltage during the sequence into ACTIVE state (from INITIALIZE or
STBY) and UV is not masked, the power-down-sequence starts at the end of the current slot.

If the device detects an undervoltage during the sequence into ACTIVE state (from INITIALIZE or STBY) and UV is not masked, the power-down-sequence starts at the end of the current slot.

If the device detects an undervoltage in ACTIVE-state or STBY-state and UV is not masked, the power-down sequence starts immediately. OC-detection is not maskable.

Over-Current (OC) Limit

The TPS65214 provides current-limit on the LDO-outputs. If the PMIC detects over-current for t_{DEGLITCH_OC_short}, respectively for t_{DEGLITCH_OC_long} (configurable individually per rail with EN_LONG_DEGL_FOR_OC_LDOx in OC_DEGL_CONFIG register; applicable for rising-edge only), the device sets INT_LDO_1_2_IS_SET in INT_SOURCE register and bit LDOx_OC in INT_LDO_1_2. The effected rail is deactivated immediately.

During a voltage transition (for example, at power-up), the overcurrent detection is blanked and gets activated when the voltage transition completed.

If the over-current occurs during the sequence into ACTIVE state (from INITIALIZE or STBY), the device deactivates the affected rail immediately and starts the power-down-sequence at the end of the current slot.

If the over-current occurs in ACTIVE-state or STBY-state, the device deactivates the affected rail immediately and starts the power-down sequence.

OC-detection is not maskable, but the deglitch-time is configurable. TI recommends to use t_{DEGLITCH_OC_short}. Extended over-current can lead to increased aging or overshoot upon recovery.

Short-Circuit-to-Ground (SCG) Monitor

The TPS65214 detects short-to-ground (SCG) faults on the LDO-outputs. The reaction to the detection of an SCG event is to set INT_LDO_1_2_IS_SET in INT_SOURCE register and bit LDOx_SCG in INT_LDO_1_2 register. The affected rail is deactivated immediately. The device sequences down all outputs and transitions into INTIALIZE state.

SCG-detection is not maskable.

If a rail gets enabled, the device blanks SCG detection initially to allow the rail to ramp above the SCG-threshold.

Residual Voltage (RV) Monitor

The TPS65214 detects residual voltage (RV) faults on the LDO-outputs. The reaction to the detection of an RV event is to set INT_RV_IS_SET bit in INT_SOURCE register and bit LDOx_RV in INT_RV register. The RV-detection is not maskable, but the nINT-reaction can be configured globally for all rails by MASK_INT_FOR_RV in INT_MASK_WARM register. The device sets the LDOx_RV-flag regardless of masking, INT_RV_IS_SET bit is only set if nINT is asserted. The fault-reaction time and potential state-transition depends on the situation when the faults are detected:

• If the device detects residual voltage during power-up, ACTIVE_TO_STANDBY, or STANDBY_TO_ACTIVE sequences, the sequence is aborted and the device powers down. The shutdown-fault-reaction is maskable by bit BYPASS_RV_FOR_RAIL_ENABLE in register GENERAL_CONFIG.
• If the device detects residual voltage for more than 80ms on any rail that was deactivated during STBY state during a request to leave STBY state, the device transitions into INITIALIZE state. The device sets the LDOx_RV-bit if the condition persists for 4ms to 5ms, but less than 80ms.
• If residual voltage is detected during an EN-command of the rail by I2C, the LDOx_RV-bit is set immediately, but no state transition occurs.

Temperature Monitor

The LDOs have a local over-temperature sensor. The reaction to a temperature warning is dependent on the configuration of the respective SENSOR_x_WARM_MASK bit in and the MASK_EFFECT bit in INT_MASK_BUCKS register. If the temperature at the sensor exceeds T_{WARM_Rising} and is not masked, the device sets INT_SYSTEM_IS_SET bit in INT_SOURCE register and SENSOR_x_WARM bit in INT_SYSTEM register. In case the sensor detects a temperature exceeding T_{HOT_Rising} , the converters power dissipation and junction temperature exceeds safe operating value. The device powers down all active outputs immediately and sets INT_SYSTEM_IS_SET bit in INT_SOURCE register and SENSOR_x_HOT bit in INT_SYSTEM register. The TPS65214 automatically recovers once the temperature drops below the T_{WARM_FAlling} threshold value (or below the T_{HOT_FAlling} threshold value in case T_WARM is masked). The _HOT bit remains set and needs to be cleared by writing '1'. The HOT-detection is not maskable.