SLVSHK7A March   2025  – December 2025 TPS65214

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  System Control Thresholds
    6. 6.6  BUCK1, BUCK2, BUCK3 Converter
    7. 6.7  General Purpose LDOs (LDO1, LDO2)
    8. 6.8  GPIOs and multi-function pins (EN/PB/VSENSE, nRSTOUT, nINT, GPO/nWAKEUP, GPIO/VSEL, MODE/STBY)
    9. 6.9  Voltage and Temperature Monitors
    10. 6.10 I2C Interface
    11. 6.11 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Power-Up Sequencing
      2. 7.3.2  Power-Down Sequencing
      3. 7.3.3  Push Button and Enable Input (EN/PB/VSENSE)
      4. 7.3.4  OFF-Request by I2C Command
      5. 7.3.5  First Supply Detection (FSD)
      6. 7.3.6  Input Voltage Slew Rate With Automatic Power-up
      7. 7.3.7  Buck Converters (Buck1, Buck2, and Buck3)
      8. 7.3.8  Linear Regulators (LDO1 and LDO2)
      9. 7.3.9  Reset to SoC (nRSTOUT)
      10. 7.3.10 Interrupt Pin (nINT)
      11. 7.3.11 PWM/PFM and Low Power Modes (MODE/STBY)
      12. 7.3.12 General Purpose Input/Output and Voltage Select Pin (GPIO/VSEL)
      13. 7.3.13 General Purpose Output and nWAKEUP (GPO/nWAKEUP)
      14. 7.3.14 RESET-Request by I2C Command
      15. 7.3.15 Register Access Control
      16. 7.3.16 I2C-Compatible Interface
        1. 7.3.16.1 Data Validity
        2. 7.3.16.2 Start and Stop Conditions
        3. 7.3.16.3 Transferring Data
    4. 7.4 Device Functional Modes
      1. 7.4.1 Modes of Operation
        1. 7.4.1.1 OFF State
        2. 7.4.1.2 INITIALIZE State
        3. 7.4.1.3 ACTIVE State
        4. 7.4.1.4 STBY State
        5. 7.4.1.5 SLEEP State
        6.       49
        7. 7.4.1.6 Fault Handling
  9. 8 User Registers
    1. 8.1 Device Registers
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Typical Application Example
      2. 9.2.2 Design Requirements
      3. 9.2.3 Detailed Design Procedure
        1. 9.2.3.1 Application Curves
        2. 9.2.3.2 Buck1, Buck2, Buck3 Design Procedure
        3. 9.2.3.3 LDO1, LDO2 Design Procedure
        4. 9.2.3.4 VSYS, VDD1P8
        5. 9.2.3.5 Digital Signals Design Procedure
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

7.3.12 General Purpose Input/Output and Voltage Select Pin (GPIO/VSEL)

The TPS65214 GPIO/VSEL pin function can be configured through bit GPIO_VSEL_CONFIG in MFP_1_CONFIG register.

CAUTION: GPIO_VSEL_CONFIG must not change during operation.

GPIO/VSEL Configured as 'GPIO':

If configured as 'GPIO', the pin is configurable as an input or an output through bit GPIO_CONFIG in GENERAL_CONFIG register. GPIO configuration bits are changeable during device operation.

  • When configured as an input, the pin level can be used as a sequence input with slot assignment by the GPIO_SEQUENCE_SLOT register with the corresponding slot duration. The internal sequencer waits for the GPIO/VSEL pin to reach the on state configured by the GPIO_SEQUENCE_POLARITY bit before proceeding with the power sequence. If the pin does not reach the on state within 80ms, the device sets the TIMEOUT bit and transitions to the INITIALIZE state.
  • When configured as an output, the pin can be used to sequence external rails. The pin can be included in the power sequence or be controlled via I2C-interface, writing GPIO_EN in GENERAL_CONFIG register. The GPIO is released high if activated. The polarity is not changeable.

GPIO/VSEL Configured as 'VSEL':

If configured as 'VSEL', the pin level is used to set the output voltage of Buck1 or Buck3 through bit VSEL_RAIL in MFP_1_CONFIG register. The table below shows the various combinations.

CAUTION: VSEL functionality is hard-wired and must not change during operation.

Table 7-6 GPIO/VSEL Configuration options
GPIO_VSEL_CONFIG GPIO_CONFIG VSEL_RAIL PIN Status Output (V) Rail
0:GPIO 0 = output X GPIO_EN VIO GPIO
0:GPIO 1 = input X Externally driven n/a GPIO
1:VSEL X 0 = Buck1 0 BUCK1_VOUT BUCK1
1:VSEL X 0 = Buck1 open 0.75V BUCK1
1:VSEL X 0 = Buck1 1 1.1V BUCK1
1:VSEL X 1 = Buck3 0 BUCK3_VOUT BUCK3
1:VSEL X 1 = Buck3 open 1.1V BUCK3
1:VSEL X 1 = Buck3 1 1.2V BUCK3