SLVSHK7A March   2025  â€“ December 2025 TPS65214

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Comparison
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  System Control Thresholds
    6. 6.6  BUCK1, BUCK2, BUCK3 Converter
    7. 6.7  General Purpose LDOs (LDO1, LDO2)
    8. 6.8  GPIOs and multi-function pins (EN/PB/VSENSE, nRSTOUT, nINT, GPO/nWAKEUP, GPIO/VSEL, MODE/STBY)
    9. 6.9  Voltage and Temperature Monitors
    10. 6.10 I2C Interface
    11. 6.11 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Power-Up Sequencing
      2. 7.3.2  Power-Down Sequencing
      3. 7.3.3  Push Button and Enable Input (EN/PB/VSENSE)
      4. 7.3.4  OFF-Request by I2C Command
      5. 7.3.5  First Supply Detection (FSD)
      6. 7.3.6  Input Voltage Slew Rate With Automatic Power-up
      7. 7.3.7  Buck Converters (Buck1, Buck2, and Buck3)
      8. 7.3.8  Linear Regulators (LDO1 and LDO2)
      9. 7.3.9  Reset to SoC (nRSTOUT)
      10. 7.3.10 Interrupt Pin (nINT)
      11. 7.3.11 PWM/PFM and Low Power Modes (MODE/STBY)
      12. 7.3.12 General Purpose Input/Output and Voltage Select Pin (GPIO/VSEL)
      13. 7.3.13 General Purpose Output and nWAKEUP (GPO/nWAKEUP)
      14. 7.3.14 RESET-Request by I2C Command
      15. 7.3.15 Register Access Control
      16. 7.3.16 I2C-Compatible Interface
        1. 7.3.16.1 Data Validity
        2. 7.3.16.2 Start and Stop Conditions
        3. 7.3.16.3 Transferring Data
    4. 7.4 Device Functional Modes
      1. 7.4.1 Modes of Operation
        1. 7.4.1.1 OFF State
        2. 7.4.1.2 INITIALIZE State
        3. 7.4.1.3 ACTIVE State
        4. 7.4.1.4 STBY State
        5. 7.4.1.5 SLEEP State
        6.       49
        7. 7.4.1.6 Fault Handling
  9. User Registers
    1. 8.1 Device Registers
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Typical Application Example
      2. 9.2.2 Design Requirements
      3. 9.2.3 Detailed Design Procedure
        1. 9.2.3.1 Application Curves
        2. 9.2.3.2 Buck1, Buck2, Buck3 Design Procedure
        3. 9.2.3.3 LDO1, LDO2 Design Procedure
        4. 9.2.3.4 VSYS, VDD1P8
        5. 9.2.3.5 Digital Signals Design Procedure
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

PWM/PFM and Low Power Modes (MODE/STBY)

The TPS65214 supports low power modes through the I2C-control or through the MODE/STBY pin. The configuration of the pin is selected by MODE_STBY_CONFIG in MFP_2_CONFIG register. The polarity of this pin can be configured by writing to MODE_STBY_POLARITY in MFP_1_CONFIG register. The polarity-configuration must not change after power-up.

MODE/STBY Configured as 'MODE'

If configured as 'MODE', the pin-status determines the switching-mode of the buck-converters. Forcing this pin for longer than tDEGLITCH_MFP forces the buck-regulators into PWM-mode (irrespective of load current). De-asserting this pin low allows the buck regulators to enter PFM-mode. The entry into PFM and exit from PFM is governed by the load current.

  • The selection of auto-PFM/forced-PWM can also be controlled by writing to the bit MODE_I2C_CTRL in MFP_1_CONFIG register.
  • A change of the MODE does not cause a state-transition.
  • During power-up of any one of the three bucks, a MODE change is blanked on this rail and only takes effect after the ramp completed.

Table 7-3 MODE Configuration

Pin

Pin-Setting

Polarity

Pin-State

MODE_I2C_CTRL bit

Device Mode

MODE/STBY

MODE

x

x

1

forced PWM

MODE/STBY

MODE

0

L

0

auto-PFM

MODE/STBY

MODE

0

H

0

forced PWM

MODE/STBY

MODE

1

L

0

forced PWM

MODE/STBY

MODE

1

H

0

auto-PFM

MODE/STBY Configured as 'STBY'

If configured as 'STBY', forcing this pin for longer than tDEGLITCH_MFP sequences the device into the STBY or SLEEP state depending on bit STBY_SLEEP_CONFIG in register STBY_2_CONFIG.

  • If configured for STBY state, the device sequences down the rails selected in the STBY_1_CONFIG and STBY_2_CONFIG registers. De-asserting this pin sequences the selected rails on again.
  • If configured for SLEEP state, the device sequences down all rails and ignores the MODE/STBY pin state.

A transition into and out of STBY or SLEEP state can also be controlled by writing to the bit STBY_I2C_CTRL in MFP_CTRL register, provided I2C communication is supported during STBY state.

  • A change of the MODE/STBY pin configured as 'STBY' does cause a state-transition by definition.
  • Regardless of the pin-setting, the device always powers up into ACTIVE state. The device reacts to the STBY-pin-state or I2C-commands only after entering ACTIVE state.

Table 7-4 STBY Configuration

Pin

Pin-Setting

Polarity

Pin-State

STBY_I2C_CTRL bit Device State

MODE/STBY

STBY

x

x

1

STBY or SLEEP

MODE/STBY

STBY

0

L

0

STBY or SLEEP

MODE/STBY

STBY

0

H

0

ACTIVE

MODE/STBY

STBY

1

L

0

ACTIVE

MODE/STBY

STBY

1

H

0

STBY or SLEEP

MODE/STBY Configured as 'MODE & STBY'

The pin can be configured to perform both functions, MODE and STBY simultaneously. The dual functionality is only realized when STBY_SLEEP_CONFIG is configured for STBY state.

Forcing this pin for longer than tDEGLITCH_MFP sequences down the rails selected to turn off in the STBY_1_CONFIG and STBY_2_CONFIG registers (STBY function). Any buck-regulators configured to remain on in STBY operate in auto-PFM mode (MODE function). De-asserting this pin sequences the selected rails on again and forces the buck-regulators to forced-PWM. Polarity settings need to be harmonized for this configuration.

  • If a transition into and out of STBY state is commanded by writing to the bit STBY_I2C_CTRL in MFP_CTRL register (provided I2C communication is supported during STBY state), a separate command for the MODE-change is required by writing to the bit MODE_I2C_CTRL in MFP_1_CONFIG register.
  • A change of the MODE/STBY pin configured as 'MODE&STBY' does cause a state-transition by definition.
  • By default STBY is deasserted and the pin is ignored until the device completed the power-up-sequence. During power-up of any one of the three bucks, a MODE-change is blanked on this rail and only takes effect after the ramp completed. A state-change commanded by STBY-pin is reacted to even during the ramp of rails (except during INITIALIZE-to-ACTIVE transition).

Please see below truth-table for pin- and I2C-commands.

Table 7-5 MODE and STBY Configuration

Pin

Pin-setting

Polarity

Pin-state

STBY_I2C_CTRL bit MODE_I2C_CTRL bit Device State Device Mode
MODE/STBY MODE & STBY 0 L x 0 STBY or SLEEP auto-PFM
MODE/STBY MODE & STBY 0 L x 1 STBY or SLEEP forced PWM
MODE/STBY MODE & STBY 0 H 0 x ACTIVE forced PWM
MODE/STBY MODE & STBY 0 H 1 x STBY or SLEEP forced PWM
MODE/STBY MODE & STBY 1 L 0 x ACTIVE forced PWM
MODE/STBY MODE & STBY 1 L 1 x STBY or SLEEP forced PWM
MODE/STBY MODE & STBY 1 H x 0 STBY or SLEEP auto-PFM
MODE/STBY MODE & STBY 1 H x 1 STBY or SLEEP forced PWM