Abstract

High-speed multiplexed analog-to-digital converters (ADCs) like those found on C2000™ series microcontrollers enable fast sensing of multiple feedback signals in real-time control applications. The signal conditioning circuits for these feedback signals should be carefully designed and evaluated to ensure that adequate settling is achieved in the time allocated for the ADC's sample-and-hold (S+H). In cases where adequate settling is not achieved in the hardware design of the signal conditioning circuits, memory cross-talk issues can arise in the system. This application report reviews the causes and symptoms of memory cross-talk and then presents two possible strategies for mitigating the memory cross-talk error: dedicating an ADC to the affected signal (resulting in only self cross-talk) and sampling ground before the affected signal (transforming the memory cross-talk into a gain error, which can subsequently be calibrated out of the system).

Project collateral discussed in this document can be downloaded from the following URL: https://www.ti.com/lit/zip/spracw9.