DS90LT012AH

現行

高溫 3-V LVDS 差動線路接收器

產品詳細資料

Function Receiver Protocols CML, LVDS, LVPECL Number of transmitters 0 Number of receivers 1 Supply voltage (V) 3.3 Signaling rate (MBits) 400 Input signal CML, LVDS, LVPECL Output signal CMOS Rating Catalog Operating temperature range (°C) -40 to 125
Function Receiver Protocols CML, LVDS, LVPECL Number of transmitters 0 Number of receivers 1 Supply voltage (V) 3.3 Signaling rate (MBits) 400 Input signal CML, LVDS, LVPECL Output signal CMOS Rating Catalog Operating temperature range (°C) -40 to 125
SOT-23 (DBV) 5 8.12 mm² 2.9 x 2.8
  • –40°C to +125°C Temperature Range Operation
  • Compatible With ANSI TIA/EIA-644-A Standard
  • >400-Mbps (200-MHz) Switching Rates
  • 100-ps Differential Skew (Typical)
  • 3.5-ns Maximum Propagation Delay
  • Integrated Line Termination Resistor (100 Ω Typical)
  • Single 3.3-V Power Supply Design (2.7-V to 3.6-V Range)
  • Power-Down High Impedance on LVDS Inputs
  • LVDS Inputs Accept LVDS/CML/LVPECL Signals
  • Pinout Simplifies PCB Layout
  • Low Power Dissipation (10 mW Typical at 3.3-V Static)
  • 5-Pin SOT-23 Package
  • –40°C to +125°C Temperature Range Operation
  • Compatible With ANSI TIA/EIA-644-A Standard
  • >400-Mbps (200-MHz) Switching Rates
  • 100-ps Differential Skew (Typical)
  • 3.5-ns Maximum Propagation Delay
  • Integrated Line Termination Resistor (100 Ω Typical)
  • Single 3.3-V Power Supply Design (2.7-V to 3.6-V Range)
  • Power-Down High Impedance on LVDS Inputs
  • LVDS Inputs Accept LVDS/CML/LVPECL Signals
  • Pinout Simplifies PCB Layout
  • Low Power Dissipation (10 mW Typical at 3.3-V Static)
  • 5-Pin SOT-23 Package

The DS90LT012AH is a single CMOS differential line receiver designed for applications requiring ultra-low power dissipation, low noise, and high data rates. The devices are designed to support data rates in excess of 400 Mbps (200 MHz) using Low Voltage Differential Swing (LVDS) technology

The DS90LT012AH accepts low voltage (350 mV typical) differential input signals and translates them to 3-V CMOS output levels. The DS90LT012AH includes an input line termination resistor for point-to-point applications.

The DS90LT012AH and companion LVDS line driver DS90LV011AH provide a new alternative to high power PECL/ECL devices for high-speed interface applications.

The DS90LT012AH is a single CMOS differential line receiver designed for applications requiring ultra-low power dissipation, low noise, and high data rates. The devices are designed to support data rates in excess of 400 Mbps (200 MHz) using Low Voltage Differential Swing (LVDS) technology

The DS90LT012AH accepts low voltage (350 mV typical) differential input signals and translates them to 3-V CMOS output levels. The DS90LT012AH includes an input line termination resistor for point-to-point applications.

The DS90LT012AH and companion LVDS line driver DS90LV011AH provide a new alternative to high power PECL/ECL devices for high-speed interface applications.

下載 觀看有字幕稿的影片 影片

您可能會感興趣的類似產品

open-in-new 比較替代產品
引腳對引腳的功能與所比較的產品相同
DS90LT012AQ-Q1 現行 車用 LVDS 差動線路接收器 Automotive grade with temperature range from –40ºC to +125ºC

技術文件

star =TI 所選的此產品重要文件
找不到結果。請清除您的搜尋條件,然後再試一次。
檢視所有 3
類型 標題 日期
* Data sheet DS90LT012AH high temperature 3-V LVDS differential line receiver datasheet (Rev. B) PDF | HTML 2019年 1月 10日
Application brief How Far, How Fast Can You Operate LVDS Drivers and Receivers? 2018年 8月 3日
Application note An Overview of LVDS Technology 1998年 10月 5日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

DS90LV047-48AEVM — DS90LV047-48AEVM 評估模組

The DS90LV047-48AEVM is an evaluation module (EVM) designed for performance and functional evaluation of Texas Instruments' DS90LV047A 3-V LVDS quad CMOS differential line driver and DS90LV048A 3-V LVDS CMOS differential line receiver. With this kit, users can quickly evaluate the output (...)
使用指南: PDF
TI.com 無法提供
模擬型號

DS90LT012A IBIS Model

SNLM044.ZIP (11 KB) - IBIS Model
模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
模擬工具

TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
封裝 引腳 下載
SOT-23 (DBV) 5 檢視選項

訂購與品質

內含資訊:
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 資格摘要
  • 進行中可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點

建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

內容係由 TI 和社群貢獻者依「現狀」提供,且不構成 TI 規範。檢視使用條款

若有關於品質、封裝或訂購 TI 產品的問題,請參閱 TI 支援。​​​​​​​​​​​​​​

影片