現在提供此產品的更新版本
引腳對引腳且具備與所比較裝置相同的功能
SN65HVD255
- Meets the Requirements of ISO11898-2
- Turbo CAN:
- Short and Symmetrical Propagation Delay
Times and Fast Loop Times for Enhanced
Timing Margin - Higher Data Rates in CAN Networks
- Short and Symmetrical Propagation Delay
- I/O Voltage Range Supports 3.3-V and 5-V MCUs
- Ideal Passive Behavior When Unpowered
- Bus and Logic Pins are High Impedance (No
Load) - Power Up and Power Down With Glitch-Free
Operation on Bus
- Bus and Logic Pins are High Impedance (No
- Protection Features
- HBM ESD Protection Exceeds ±12 kV
- Bus Fault Protection –27 V to 40 V
- Undervoltage Protection on Supply Pins
- Driver Dominant Time Out (TXD DTO)
- SN65HVD257: Receiver-Dominant Time Out
(RXD DTO) - SN65HVD257: FAULT Output Pin
- Thermal Shutdown Protection
- Characterized for –40°C to 125°C Operation
This CAN transceiver meets the ISO1189-2 High Speed CAN (Controller Area Network) Physical Layer standard. It is designed for data rates in excess of 1 Mbps for CAN in short networks, and enhanced timing margin and higher data rates in long and highly-loaded networks. The device provides many protection features to enhance device and CAN-network robustness. The SN65HVD257 device adds additional features, allowing for easy design of redundant and multitopology networks with fault indication for higher levels of functional safety in the CAN system.
技術文件
找不到結果。請清除您的搜尋條件,然後再試一次。
檢視所有 2 | 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | SN65HVD25x Turbo CAN Transceivers for Higher Data Rates and Large Networks Including Features for Functional Safety datasheet (Rev. D) | PDF | HTML | 2015年 5月 9日 |
| Application note | CAN and LIN transceiver low-power modes | 2019年 2月 25日 |
設計與開發
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
模擬工具
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
PSpice® for TI 是有助於評估類比電路功能的設計和模擬環境。這款全功能設計和模擬套件使用 Cadence® 的類比分析引擎。PSpice for TI 包括業界最大的模型庫之一,涵蓋我們的類比和電源產品組合,以及特定類比行為模型,且使用無需支付費用。
PSpice for TI 設計和模擬環境可讓您使用其內建函式庫來模擬複雜的混合訊號設計。在進行佈局和製造之前,建立完整的終端設備設計和解決方案原型,進而縮短上市時間並降低開發成本。
在 PSpice for TI 設計與模擬工具中,您可以搜尋 TI (...)
PSpice for TI 設計和模擬環境可讓您使用其內建函式庫來模擬複雜的混合訊號設計。在進行佈局和製造之前,建立完整的終端設備設計和解決方案原型,進而縮短上市時間並降低開發成本。
在 PSpice for TI 設計與模擬工具中,您可以搜尋 TI (...)
模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
參考設計
TIDA-00267 — 極性修正隔離式 CAN 參考設計
A ready to use design that efficiently solves the problem of improper installation by adding antiparallel communication channels and appropriate control signal to enable polarity correction for the Controller Area Network (CAN) bus.
電路圖: PDF
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| SOIC (D) | 8 | Ultra Librarian |
訂購與品質
內含資訊:
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
內含資訊:
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。