TXE8124
- Operating supply voltage range of 1.65V to 5.5V
- Low standby current consumption of 2.3µA typical
- SPI SCLK Frequency
- 10MHz from 3.3V to 5.5V
- 5MHz from 1.65V to 5.5V
- SPI daisy-chain supported
- SPI read and write with burst mode
- Multi-port SPI command to configure multiple ports simultaneously
- IOFF supported input port pins
- Active-low reset input (RESET)
- Open-drain active-low interrupt output (INT)
- Interrupt mask and status per I/O
- Interrupt status per port
- Built-in fail-safe I/O feature
- Individual I/O configuration for
- Input and Output function
- Polarity inversion
- Output push-pull and open-drain selection
- Integrated pull-up or pull-down selection
- Bus-hold feature to maintain last I/O state
- Glitch filter enable selection
- Latched outputs with 10mA drive capability for directly driving LEDs
- Latch-up performance exceeds 100mA per JESD 78, class II
- ESD protection exceeds JESD 22
- 2000V Human-body model (A114-A)
- 1000V Charged-device model (C101)
The TXE8124 devices provide general purpose parallel input/output (I/O) expansion for the four wire Serial Peripheral Interface (SPI) protocol and is designed for 1.65V to 5.5V VCC operation. The TXE8124 supports both standard point-to-point communication along with daisy-chaining of multiple devices.
The device supports 10MHz from 3.3V to 5.5V and 5MHz from 1.65V to 5.5V. I/O expanders, such as the TXE8124, are designed for when additional I/Os are needed for switches, sensors, push-buttons, LEDs, and fans.
The TXE8124 devices has 3 I/O ports of 8 IOs each, which include additional features designed to enhance the I/O performance in terms of speed, power consumption, and flexibility. These include per I/O programmable open-drain or push-pull outputs, programmable pull-up and pull-down resistors, bus-hold latchable inputs, maskable interrupt, interrupt status register, glitch filter and a fail-safe register mode which is enabled by the FAIL-SAFE pin.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 日期 |
|---|---|---|---|---|
| * | Data sheet | TXE8124 24-Bit SPI Bus I/O Expander with Interrupt Output, Reset Input, and I/O Configuration Registers datasheet | PDF | HTML | 2026年 3月 30日 |
| Functional safety information | TXE8124 Functional Safety FIT Rate, FMD and Pin FMA | PDF | HTML | 2026年 4月 15日 | |
| Application note | Discrete Active Cell Balancing Design | PDF | HTML | 2025年 10月 29日 | |
| Application brief | Understanding the SPI Bus | PDF | HTML | 2025年 8月 22日 | |
| Application note | How to Program TXE81XX SPI I/O Expander Family | PDF | HTML | 2025年 7月 24日 |
設計與開發
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IO-EXP-ADAPTER-EVM — IO 擴展器轉接器評估模組
TXE81XXEVM — TXE81XX 評估模組
TXE81XXEVM 可用於評估 TXE81XX 系列 SPI I/O 擴展器。此 EVM 支援採用引線封裝類型 DGS（24 和 32）與 DGG (56) 的 TXE8116、TXE8124 和 TXE8148（分別為 16 位元、24 位元和 48 位元）。EVM 提供多個測試點和接頭，以配合每個擴展器提供的大量 I/O。提供公頭和母頭類型組合，便於輕鬆進行分流連接。
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TINA-TI — 基於 SPICE 的類比模擬程式
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| VQFN (RHB) | 32 | Ultra Librarian |
| VSSOP (DGS) | 32 | Ultra Librarian |
訂購與品質
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- 晶圓廠位置
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