TIDA-010132

Multichannel RF transceiver reference design for radar applications

Design files

TIDA-010132

Design files

Overview

This reference design, an 8-channel analog front end (AFE), uses two AFE7444 4-channel RF transceivers and LMK04828-LMX2594-based clocking subsystem which can enable designs to scale to 16 channels or more. Each AFE channel consists of a 14-bit, 9GSPS DAC and a 3GSPS ADC that is synchronized to less than 10ps skew with > 75-dB dynamic range at 2.6GHz.

Features

High density, scalable 8-channel RF sampling analog frontend with single FMC interface
System clock skew less than 5 psec across devices
Clock phase adjustment with 0.5 psec step resolution
Low noise clock generation for 14-bit analog frontend performance
Digital function (NCO, DDC and so forth) synchronization across multiple transceivers

Industrial

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Design files & products

Design files

Download ready-to-use system files to speed your design process.

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Design guide — TIDA-010132

TIDUEI5.PDF (9578 KB)

Reference design overview and verified performance test data

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Assembly drawing — TIDA-010132

TIDRZS7.PDF (5876 KB)

Detailed overview of design layout for component placement

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Bill of materials (BOM) — TIDA-010132

TIDRZS6.PDF (235 KB)

Complete listing of design components, reference designators, and manufacturers/part numbers

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CAD/CAE symbol — TIDA-010132

TIDRZS9.ZIP (20489 KB)

Files used for 3D models or 2D drawings of IC components

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Gerber file — TIDA-010132

TIDCFH4.ZIP (14069 KB)

Design file that contains information on physical board layer of design PCB

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PCB layout — TIDA-010132

TIDRZS8.PDF (33502 KB)

PCB layer plot file used for generating PCB design layout

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Schematic — TIDA-010132

TIDRZS5.PDF (3828 KB)

Detailed schematic diagram for design layout and components

Products

Includes TI products in the design and potential alternatives.

Voltage translators

TXS0102V — Two-bit bidirectional level shifter for open-drain and push-pull applications

Data sheet: PDF | HTML

LVDS, M-LVDS & PECL ICs

DS90LV028AQ-Q1 — Automotive LVDS dual differential line receiver

Data sheet: PDF | HTML

Clock jitter cleaners

LMK04828 — Ultra low-noise JESD204B compliant clock jitter cleaner with integrated 2370 to 2630-MHz VCO0.

Data sheet: PDF | HTML

Inverting buffers & drivers

SN74LVC1G04 — Single 1.65-V to 5.5-V inverter

Data sheet: PDF | HTML

Clock buffers

LMK00304 — 3.1-GHz differential clock buffer/level translator with 4 configurable outputs

Data sheet: PDF | HTML

Noninverting buffers & drivers

SN74LVC2G125 — 2-ch, 1.65-V to 5.5-V buffers with 3-state outputs

Data sheet: PDF | HTML

Analog & precision switches & muxes

SN74LVC1G3157 — 5V, 2:1 (SPDT), 1-channel, analog switch

Data sheet: PDF | HTML

Oscillators

LMK61E2 — Ultra-low jitter, EEPROM programmable oscillator for medical imaging and test and measurement

Data sheet: PDF | HTML

D-type latches

SN74LVC573A — Octal Transparent D-Type Latches With 3-State Outputs

Data sheet: PDF

Clock buffers

CDCLVP1102 — Low jitter 1:2 universal-to-LVPECL buffer

Data sheet: PDF | HTML

Voltage translators

TXS0102 — 2-Bit Bidirectional Voltage-Level Shifter for Open-Drain and Push-Pull Application

Data sheet: PDF | HTML

RF transceivers

AFE7444 — 4-transmit, 4-receive RF-sampling transceiver, 10-MHz to 6-GHz, max 600-MHz IBW

Data sheet: PDF | HTML

Clock jitter cleaners

LMK04832 — Ultra-low-noise, 3.2-GHz, 15-output, JESD204B clock jitter cleaner with dual loop

Data sheet: PDF | HTML

I2C & SPI general-purpose I/Os (GPIOs)

TCA9534A — 8-bit 1.65- to 5.5-V I2C/SMBus I/O expander with interrupt, & config registers

Data sheet: PDF | HTML

RF PLLs & synthesizers

LMX2594 — 15-GHz wideband PLLatinum™ RF synthesizer with phase synchronization and JESD204B support

Data sheet: PDF | HTML

Voltage translators

TXS0102V-Q1 — Automotive 2-bit bidirectional level shifter for open-drain and push-pull applications

Data sheet: PDF | HTML

Linear & low-dropout (LDO) regulators

TPS7A47 — 1A, 36V low-noise high-PSRR low-dropout voltage regulator with enable

Data sheet: PDF | HTML

Linear & low-dropout (LDO) regulators

LP5907 — 250-mA, low-noise, high-PSRR, ultra-low-dropout voltage regulator with low IQ and enable

Data sheet: PDF | HTML

Start development

Hardware development

Evaluation board

TSW14J57EVM — Data capture/pattern generator: data converter EVM with 16 JESD204B lanes from 1.6-15Gbps

This reference design, an 8-channel analog front end (AFE), uses two AFE7444 4-channel RF transceivers and LMK04828-LMX2594-based clocking subsystem which can enable designs to scale to 16 channels or more. Each AFE channel consists of a 14-bit, 9GSPS DAC and a 3GSPS ADC that is synchronized to (...)

Supported products & hardware

Hardware development

Reference design

TIDA-010122 — Reference design synchronizing data converter DDC and NCO features for multi-channel RF systems

TIDA-010128 — Scalable 20.8 GSPS reference design for 12 bit digitizers

TIDA-010131 — Multichannel RF transceiver clocking reference design for RADARs and wireless 5G testers

TIDA-010132 — Multichannel RF transceiver reference design for radar applications

TIDA-01022 — Flexible 3.2-GSPS multi-channel AFE reference design for DSOs, radar and 5G wireless test systems

TIDA-01027 — Low-noise power supply reference design maximizing performance in 12.8-GSPS data acquisition systems

TIDA-01028 — 12.8-GSPS analog front end reference design for high-speed oscilloscope and wide-band digitizer

TIDA-01442 — Direct RF-Sampling Radar Receiver for L-, S-, C-, and X-Band Using ADC12DJ3200 Reference Design

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TSW14J57EVM — Data capture/pattern generator: data converter EVM with 16 JESD204B lanes from 1.6-15Gbps

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